matvey
/
mmv5_FirmwareMS
1
0
Fork 0
Code Issues Pull Requests Releases 1 Wiki Activity

Changed I2C address to 0x57 and added SIM board model register at 0x12

This commit is contained in:
matt 2020-03-24 16:34:03 +07:00
parent d82a0ab464
commit 49a8fd7224
1 changed files with 26 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
sim_switcher_top.vhd
View File

@ -9,7 +9,7 @@ entity sim_switcher_top is
SYSFREQ : integer := 25_000_000; -- System clock frequency
INSIM : std_logic := '0'; -- In Simulation flag: 0 - real work (default), 1 - simulation
-- I2C parameters
I2C_SLAVE_ADDR : std_logic_vector(6 downto 0) := "1010110" -- Address of I2C slave, dafault 0x56
I2C_SLAVE_ADDR : std_logic_vector(6 downto 0) := "1010111" -- Address of I2C slave, dafault 0x57
);
port (
-- Clock and reset
@ -34,6 +34,9 @@ entity sim_switcher_top is
i2c_scl_io : inout std_logic;
i2c_sda_io : inout std_logic;
-- SIM board CONF bits
sim_board_conf_i :in std_logic_vector(2 downto 0);
-- SIM signals
sim_detect_i : in std_logic_vector(7 downto 0);
sim_pwron_o : out std_logic_vector(7 downto 0);
@ -111,6 +114,9 @@ architecture rtl of sim_switcher_top is
-- Modem data signals
signal s_mod_data_i, sdb_mod_data_i, sw_mod_data_i, sw_mod_data_prev, s_mod_data_o, sw_mod_data_o: std_logic_vector(7 downto 0);
-- SIM board CONF bits register
signal reg_sim_board_conf: std_logic_vector(2 downto 0);
-- SIM switch IRQs for repeater state machine reset upon SIM change
signal reg_sim_change_irq: std_logic_vector(15 downto 0) := (others => '0');
@ -238,6 +244,16 @@ begin
end if;
end process;
---------------------------
-- SIM board CONF update --
---------------------------
simb_conf_upd_proc: process(clk25_i) is
begin
if (rising_edge(clk25_i)) then
reg_sim_board_conf <= sim_board_conf_i;
end if;
end process;
--------------------------------
-- I2C slave interface to CPU --
--------------------------------
@ -274,6 +290,7 @@ begin
6 => 6,
7 => 7
);
-- SIM change IRQ register reset
reg_sim_change_irq <= (others => '0');
@ -299,6 +316,10 @@ begin
i2c_data_to_master <= x"20";
i2c_slv_state <= wait_while_sent;
when x"12" => -- Read SIM board model regiser
i2c_data_to_master <= "00000" & reg_sim_board_conf;
i2c_slv_state <= wait_while_sent;
when x"0A" => -- Read SIMs detect register (LSB)
i2c_data_to_master <= reg_sim_det(7 downto 0);
i2c_slv_state <= wait_while_sent;
@ -380,13 +401,13 @@ begin
reg_sim_modemnum(2) <= to_integer(unsigned(i2c_data_from_master(3 downto 0)));
when x"A3" => -- Write SIM4 modem register
reg_sim_modemnum(3) <= to_integer(unsigned(i2c_data_from_master(3 downto 0)));
when x"A4" => -- Write SIM1 modem register
when x"A4" => -- Write SIM5 modem register
reg_sim_modemnum(4) <= to_integer(unsigned(i2c_data_from_master(3 downto 0)));
when x"A5" => -- Write SIM2 modem register
when x"A5" => -- Write SIM6 modem register
reg_sim_modemnum(5) <= to_integer(unsigned(i2c_data_from_master(3 downto 0)));
when x"A6" => -- Write SIM3 modem register
when x"A6" => -- Write SIM7 modem register
reg_sim_modemnum(6) <= to_integer(unsigned(i2c_data_from_master(3 downto 0)));
when x"A7" => -- Write SIM4 modem register
when x"A7" => -- Write SIM8 modem register
reg_sim_modemnum(7) <= to_integer(unsigned(i2c_data_from_master(3 downto 0)));
when others =>