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Modified NetworkInterface.c

This commit is contained in:
Alexey Bazlaev 2023-01-31 18:26:16 +07:00
parent 59cb7d469d
commit c78a3d86e8
5 changed files with 2518 additions and 1749 deletions
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FreeRTOS/source/include/NetworkInterface.h
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@ -28,309 +28,314 @@
#ifndef NETWORK_INTERFACE_H #ifndef NETWORK_INTERFACE_H
#define NETWORK_INTERFACE_H #define NETWORK_INTERFACE_H
#include "FreeRTOS.h" //#include "FreeRTOS.h"
#include "FreeRTOSIPConfig.h" //#include "FreeRTOSIPConfig.h"
#include "stdio.h" //#include "stdio.h"
#include "stdint.h" //#include "stdint.h"
#include "FreeRTOS_IP.h"
#include "Driver_ETH_MAC.h"
/* *INDENT-OFF* */ /* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/**
* @brief HAL State structures definition
*/
typedef enum
{
HAL_ETH_STATE_RESET = 0x00U, /*!< Peripheral not yet Initialized or disabled */
HAL_ETH_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
HAL_ETH_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
HAL_ETH_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
HAL_ETH_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
HAL_ETH_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */
HAL_ETH_STATE_BUSY_WR = 0x42U, /*!< Write process is ongoing */
HAL_ETH_STATE_BUSY_RD = 0x82U, /*!< Read process is ongoing */
HAL_ETH_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
HAL_ETH_STATE_ERROR = 0x04U /*!< Reception process is ongoing */
} HAL_ETH_StateTypeDef;
/**
* @brief ETH Init Structure definition
*/
typedef struct
{
uint32_t AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY
* The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps)
* and the mode (half/full-duplex).
* This parameter can be a value of @ref ETH_AutoNegotiation */
uint32_t Speed; /*!< Sets the Ethernet speed: 10/100 Mbps.
* This parameter can be a value of @ref ETH_Speed */
uint32_t DuplexMode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode
* This parameter can be a value of @ref ETH_Duplex_Mode */
uint16_t PhyAddress; /*!< Ethernet PHY address.
* This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
uint8_t * MACAddr; /*!< MAC Address of used Hardware: must be pointer on an array of 6 bytes */
uint32_t RxMode; /*!< Selects the Ethernet Rx mode: Polling mode, Interrupt mode.
* This parameter can be a value of @ref ETH_Rx_Mode */
uint32_t ChecksumMode; /*!< Selects if the checksum is check by hardware or by software.
* This parameter can be a value of @ref ETH_Checksum_Mode */
uint32_t MediaInterface; /*!< Selects the media-independent interface or the reduced media-independent interface.
* This parameter can be a value of @ref ETH_Media_Interface */
} ETH_InitTypeDef;
/**
* @brief ETH MAC Configuration Structure definition
*/
typedef struct
{
uint32_t Watchdog; /*!< Selects or not the Watchdog timer
* When enabled, the MAC allows no more then 2048 bytes to be received.
* When disabled, the MAC can receive up to 16384 bytes.
* This parameter can be a value of @ref ETH_Watchdog */
uint32_t Jabber; /*!< Selects or not Jabber timer
* When enabled, the MAC allows no more then 2048 bytes to be sent.
* When disabled, the MAC can send up to 16384 bytes.
* This parameter can be a value of @ref ETH_Jabber */
uint32_t InterFrameGap; /*!< Selects the minimum IFG between frames during transmission.
* This parameter can be a value of @ref ETH_Inter_Frame_Gap */
uint32_t CarrierSense; /*!< Selects or not the Carrier Sense.
* This parameter can be a value of @ref ETH_Carrier_Sense */
uint32_t ReceiveOwn; /*!< Selects or not the ReceiveOwn,
* ReceiveOwn allows the reception of frames when the TX_EN signal is asserted
* in Half-Duplex mode.
* This parameter can be a value of @ref ETH_Receive_Own */
uint32_t LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode.
* This parameter can be a value of @ref ETH_Loop_Back_Mode */
uint32_t ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers.
* This parameter can be a value of @ref ETH_Checksum_Offload */
uint32_t RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL,
* when a collision occurs (Half-Duplex mode).
* This parameter can be a value of @ref ETH_Retry_Transmission */
uint32_t AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping.
* This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */
uint32_t BackOffLimit; /*!< Selects the BackOff limit value.
* This parameter can be a value of @ref ETH_Back_Off_Limit */
uint32_t DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode).
* This parameter can be a value of @ref ETH_Deferral_Check */
uint32_t ReceiveAll; /*!< Selects or not all frames reception by the MAC (No filtering).
* This parameter can be a value of @ref ETH_Receive_All */
uint32_t SourceAddrFilter; /*!< Selects the Source Address Filter mode.
* This parameter can be a value of @ref ETH_Source_Addr_Filter */
uint32_t PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames)
* This parameter can be a value of @ref ETH_Pass_Control_Frames */
uint32_t BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames.
* This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */
uint32_t DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames.
* This parameter can be a value of @ref ETH_Destination_Addr_Filter */
uint32_t PromiscuousMode; /*!< Selects or not the Promiscuous Mode
* This parameter can be a value of @ref ETH_Promiscuous_Mode */
uint32_t MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter.
* This parameter can be a value of @ref ETH_Multicast_Frames_Filter */
uint32_t UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter.
* This parameter can be a value of @ref ETH_Unicast_Frames_Filter */
uint32_t HashTableHigh; /*!< This field holds the higher 32 bits of Hash table.
* This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
uint32_t HashTableLow; /*!< This field holds the lower 32 bits of Hash table.
* This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
uint32_t PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame.
* This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFF */
uint32_t ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames.
* This parameter can be a value of @ref ETH_Zero_Quanta_Pause */
uint32_t PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for
* automatic retransmission of PAUSE Frame.
* This parameter can be a value of @ref ETH_Pause_Low_Threshold */
uint32_t UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0
* unicast address and unique multicast address).
* This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */
uint32_t ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and
* disable its transmitter for a specified time (Pause Time)
* This parameter can be a value of @ref ETH_Receive_Flow_Control */
uint32_t TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode)
* or the MAC back-pressure operation (Half-Duplex mode)
* This parameter can be a value of @ref ETH_Transmit_Flow_Control */
uint32_t VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for
* comparison and filtering.
* This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */
uint32_t VLANTagIdentifier; /*!< Holds the VLAN tag identifier for receive frames */
} ETH_MACInitTypeDef;
/**
* @brief ETH DMA Configuration Structure definition
*/
typedef struct
{
uint32_t DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames.
* This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */
uint32_t ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode.
* This parameter can be a value of @ref ETH_Receive_Store_Forward */
uint32_t FlushReceivedFrame; /*!< Enables or disables the flushing of received frames.
* This parameter can be a value of @ref ETH_Flush_Received_Frame */
uint32_t TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode.
* This parameter can be a value of @ref ETH_Transmit_Store_Forward */
uint32_t TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control.
* This parameter can be a value of @ref ETH_Transmit_Threshold_Control */
uint32_t ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames.
* This parameter can be a value of @ref ETH_Forward_Error_Frames */
uint32_t ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error
* and length less than 64 bytes) including pad-bytes and CRC)
* This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */
uint32_t ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO.
* This parameter can be a value of @ref ETH_Receive_Threshold_Control */
uint32_t SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second
* frame of Transmit data even before obtaining the status for the first frame.
* This parameter can be a value of @ref ETH_Second_Frame_Operate */
uint32_t AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats.
* This parameter can be a value of @ref ETH_Address_Aligned_Beats */
uint32_t FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers.
* This parameter can be a value of @ref ETH_Fixed_Burst */
uint32_t RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction.
* This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */
uint32_t TxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Tx DMA transaction.
* This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */
uint32_t EnhancedDescriptorFormat; /*!< Enables the enhanced descriptor format.
* This parameter can be a value of @ref ETH_DMA_Enhanced_descriptor_format */
uint32_t DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode)
* This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
uint32_t DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration.
* This parameter can be a value of @ref ETH_DMA_Arbitration */
} ETH_DMAInitTypeDef;
/**
* @brief ETH DMA Descriptors data structure definition
*/
typedef struct
{
volatile uint32_t Status; /*!< Status */
uint32_t ControlBufferSize; /*!< Control and Buffer1, Buffer2 lengths */
uint32_t Buffer1Addr; /*!< Buffer1 address pointer */
uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */
/*!< Enhanced Ethernet DMA PTP Descriptors */
uint32_t ExtendedStatus; /*!< Extended status for PTP receive descriptor */
uint32_t Reserved1; /*!< Reserved */
uint32_t TimeStampLow; /*!< Time Stamp Low value for transmit and receive */
uint32_t TimeStampHigh; /*!< Time Stamp High value for transmit and receive */
} ETH_DMADescTypeDef;
/**
* @brief Received Frame Informations structure definition
*/
typedef struct
{
ETH_DMADescTypeDef * FSRxDesc; /*!< First Segment Rx Desc */
ETH_DMADescTypeDef * LSRxDesc; /*!< Last Segment Rx Desc */
uint32_t SegCount; /*!< Segment count */
uint32_t length; /*!< Frame length */
uint32_t buffer; /*!< Frame buffer */
} ETH_DMARxFrameInfos;
#define ETH_TypeDef void
/**
* @brief ETH Handle Structure definition
*/
typedef struct
{
ETH_TypeDef * Instance; /*!< Register base address */
ETH_InitTypeDef Init; /*!< Ethernet Init Configuration */
uint32_t LinkStatus; /*!< Ethernet link status */
ETH_DMADescTypeDef * RxDesc; /*!< Rx descriptor to Get */
ETH_DMADescTypeDef * TxDesc; /*!< Tx descriptor to Set */
ETH_DMARxFrameInfos RxFrameInfos; /*!< last Rx frame infos */
volatile HAL_ETH_StateTypeDef State; /*!< ETH communication state */
HAL_LockTypeDef Lock; /*!< ETH Lock */
} ETH_HandleTypeDef;
/* INTERNAL API FUNCTIONS. */
BaseType_t xNetworkInterfaceInitialise( void ); BaseType_t xNetworkInterfaceInitialise( void );
BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxNetworkBuffer, BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxDescriptor,BaseType_t xReleaseAfterSend );
BaseType_t xReleaseAfterSend );
/* The following function is defined only when BufferAllocation_1.c is linked in the project. */
void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] );
/* The following function is defined only when BufferAllocation_1.c is linked in the project. */
BaseType_t xGetPhyLinkStatus( void );
/* *INDENT-OFF* */
#ifdef __cplusplus
} /* extern "C" */
#endif
/* *INDENT-ON* */ /* *INDENT-ON* */
///**
// * @brief HAL State structures definition
// */
// typedef enum
// {
// HAL_ETH_STATE_RESET = 0x00U, /*!< Peripheral not yet Initialized or disabled */
// HAL_ETH_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
// HAL_ETH_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
// HAL_ETH_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
// HAL_ETH_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
// HAL_ETH_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */
// HAL_ETH_STATE_BUSY_WR = 0x42U, /*!< Write process is ongoing */
// HAL_ETH_STATE_BUSY_RD = 0x82U, /*!< Read process is ongoing */
// HAL_ETH_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
// HAL_ETH_STATE_ERROR = 0x04U /*!< Reception process is ongoing */
// } HAL_ETH_StateTypeDef;
//
///**
// * @brief ETH Init Structure definition
// */
//typedef struct
//{
// uint32_t AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY
// * The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps)
// * and the mode (half/full-duplex).
// * This parameter can be a value of @ref ETH_AutoNegotiation */
// uint32_t Speed; /*!< Sets the Ethernet speed: 10/100 Mbps.
// * This parameter can be a value of @ref ETH_Speed */
// uint32_t DuplexMode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode
// * This parameter can be a value of @ref ETH_Duplex_Mode */
// uint16_t PhyAddress; /*!< Ethernet PHY address.
// * This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
// uint8_t * MACAddr; /*!< MAC Address of used Hardware: must be pointer on an array of 6 bytes */
// uint32_t RxMode; /*!< Selects the Ethernet Rx mode: Polling mode, Interrupt mode.
// * This parameter can be a value of @ref ETH_Rx_Mode */
// uint32_t ChecksumMode; /*!< Selects if the checksum is check by hardware or by software.
// * This parameter can be a value of @ref ETH_Checksum_Mode */
// uint32_t MediaInterface; /*!< Selects the media-independent interface or the reduced media-independent interface.
// * This parameter can be a value of @ref ETH_Media_Interface */
//} ETH_InitTypeDef;
///**
// * @brief ETH MAC Configuration Structure definition
// */
//typedef struct
//{
// uint32_t Watchdog; /*!< Selects or not the Watchdog timer
// * When enabled, the MAC allows no more then 2048 bytes to be received.
// * When disabled, the MAC can receive up to 16384 bytes.
// * This parameter can be a value of @ref ETH_Watchdog */
// uint32_t Jabber; /*!< Selects or not Jabber timer
// * When enabled, the MAC allows no more then 2048 bytes to be sent.
// * When disabled, the MAC can send up to 16384 bytes.
// * This parameter can be a value of @ref ETH_Jabber */
// uint32_t InterFrameGap; /*!< Selects the minimum IFG between frames during transmission.
// * This parameter can be a value of @ref ETH_Inter_Frame_Gap */
// uint32_t CarrierSense; /*!< Selects or not the Carrier Sense.
// * This parameter can be a value of @ref ETH_Carrier_Sense */
// uint32_t ReceiveOwn; /*!< Selects or not the ReceiveOwn,
// * ReceiveOwn allows the reception of frames when the TX_EN signal is asserted
// * in Half-Duplex mode.
// * This parameter can be a value of @ref ETH_Receive_Own */
// uint32_t LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode.
// * This parameter can be a value of @ref ETH_Loop_Back_Mode */
// uint32_t ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers.
// * This parameter can be a value of @ref ETH_Checksum_Offload */
// uint32_t RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL,
// * when a collision occurs (Half-Duplex mode).
// * This parameter can be a value of @ref ETH_Retry_Transmission */
// uint32_t AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping.
// * This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */
// uint32_t BackOffLimit; /*!< Selects the BackOff limit value.
// * This parameter can be a value of @ref ETH_Back_Off_Limit */
// uint32_t DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode).
// * This parameter can be a value of @ref ETH_Deferral_Check */
// uint32_t ReceiveAll; /*!< Selects or not all frames reception by the MAC (No filtering).
// * This parameter can be a value of @ref ETH_Receive_All */
// uint32_t SourceAddrFilter; /*!< Selects the Source Address Filter mode.
// * This parameter can be a value of @ref ETH_Source_Addr_Filter */
// uint32_t PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames)
// * This parameter can be a value of @ref ETH_Pass_Control_Frames */
// uint32_t BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames.
// * This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */
// uint32_t DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames.
// * This parameter can be a value of @ref ETH_Destination_Addr_Filter */
// uint32_t PromiscuousMode; /*!< Selects or not the Promiscuous Mode
// * This parameter can be a value of @ref ETH_Promiscuous_Mode */
// uint32_t MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter.
// * This parameter can be a value of @ref ETH_Multicast_Frames_Filter */
// uint32_t UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter.
// * This parameter can be a value of @ref ETH_Unicast_Frames_Filter */
// uint32_t HashTableHigh; /*!< This field holds the higher 32 bits of Hash table.
// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
// uint32_t HashTableLow; /*!< This field holds the lower 32 bits of Hash table.
// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
// uint32_t PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame.
// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFF */
// uint32_t ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames.
// * This parameter can be a value of @ref ETH_Zero_Quanta_Pause */
// uint32_t PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for
// * automatic retransmission of PAUSE Frame.
// * This parameter can be a value of @ref ETH_Pause_Low_Threshold */
// uint32_t UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0
// * unicast address and unique multicast address).
// * This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */
// uint32_t ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and
// * disable its transmitter for a specified time (Pause Time)
// * This parameter can be a value of @ref ETH_Receive_Flow_Control */
// uint32_t TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode)
// * or the MAC back-pressure operation (Half-Duplex mode)
// * This parameter can be a value of @ref ETH_Transmit_Flow_Control */
// uint32_t VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for
// * comparison and filtering.
// * This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */
// uint32_t VLANTagIdentifier; /*!< Holds the VLAN tag identifier for receive frames */
//} ETH_MACInitTypeDef;
///**
// * @brief ETH DMA Configuration Structure definition
// */
//typedef struct
//{
// uint32_t DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames.
// * This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */
// uint32_t ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode.
// * This parameter can be a value of @ref ETH_Receive_Store_Forward */
// uint32_t FlushReceivedFrame; /*!< Enables or disables the flushing of received frames.
// * This parameter can be a value of @ref ETH_Flush_Received_Frame */
// uint32_t TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode.
// * This parameter can be a value of @ref ETH_Transmit_Store_Forward */
// uint32_t TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control.
// * This parameter can be a value of @ref ETH_Transmit_Threshold_Control */
// uint32_t ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames.
// * This parameter can be a value of @ref ETH_Forward_Error_Frames */
// uint32_t ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error
// * and length less than 64 bytes) including pad-bytes and CRC)
// * This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */
// uint32_t ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO.
// * This parameter can be a value of @ref ETH_Receive_Threshold_Control */
// uint32_t SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second
// * frame of Transmit data even before obtaining the status for the first frame.
// * This parameter can be a value of @ref ETH_Second_Frame_Operate */
// uint32_t AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats.
// * This parameter can be a value of @ref ETH_Address_Aligned_Beats */
// uint32_t FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers.
// * This parameter can be a value of @ref ETH_Fixed_Burst */
// uint32_t RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction.
// * This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */
// uint32_t TxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Tx DMA transaction.
// * This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */
// uint32_t EnhancedDescriptorFormat; /*!< Enables the enhanced descriptor format.
// * This parameter can be a value of @ref ETH_DMA_Enhanced_descriptor_format */
// uint32_t DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode)
// * This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
// uint32_t DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration.
// * This parameter can be a value of @ref ETH_DMA_Arbitration */
//} ETH_DMAInitTypeDef;
///**
// * @brief ETH DMA Descriptors data structure definition
// */
//typedef struct
//{
// volatile uint32_t Status; /*!< Status */
// uint32_t ControlBufferSize; /*!< Control and Buffer1, Buffer2 lengths */
// uint32_t Buffer1Addr; /*!< Buffer1 address pointer */
// uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */
// /*!< Enhanced Ethernet DMA PTP Descriptors */
// uint32_t ExtendedStatus; /*!< Extended status for PTP receive descriptor */
// uint32_t Reserved1; /*!< Reserved */
// uint32_t TimeStampLow; /*!< Time Stamp Low value for transmit and receive */
// uint32_t TimeStampHigh; /*!< Time Stamp High value for transmit and receive */
//} ETH_DMADescTypeDef;
///**
// * @brief Received Frame Informations structure definition
// */
//typedef struct
//{
// ETH_DMADescTypeDef * FSRxDesc; /*!< First Segment Rx Desc */
// ETH_DMADescTypeDef * LSRxDesc; /*!< Last Segment Rx Desc */
// uint32_t SegCount; /*!< Segment count */
// uint32_t length; /*!< Frame length */
// uint32_t buffer; /*!< Frame buffer */
//} ETH_DMARxFrameInfos;
//#define ETH_TypeDef void
///**
// * @brief ETH Handle Structure definition
// */
//typedef struct
//{
// ETH_TypeDef * Instance; /*!< Register base address */
// ETH_InitTypeDef Init; /*!< Ethernet Init Configuration */
// uint32_t LinkStatus; /*!< Ethernet link status */
// ETH_DMADescTypeDef * RxDesc; /*!< Rx descriptor to Get */
// ETH_DMADescTypeDef * TxDesc; /*!< Tx descriptor to Set */
// ETH_DMARxFrameInfos RxFrameInfos; /*!< last Rx frame infos */
// volatile HAL_ETH_StateTypeDef State; /*!< ETH communication state */
// HAL_LockTypeDef Lock; /*!< ETH Lock */
//} ETH_HandleTypeDef;
///* INTERNAL API FUNCTIONS. */
//BaseType_t xNetworkInterfaceInitialise( void );
//BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxNetworkBuffer,
// BaseType_t xReleaseAfterSend );
///* The following function is defined only when BufferAllocation_1.c is linked in the project. */
//void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] );
///* The following function is defined only when BufferAllocation_1.c is linked in the project. */
//BaseType_t xGetPhyLinkStatus( void );
///* *INDENT-OFF* */
//#ifdef __cplusplus
// } /* extern "C" */
//#endif
///* *INDENT-ON* */
#endif /* NETWORK_INTERFACE_H */ #endif /* NETWORK_INTERFACE_H */

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FreeRTOS/source/portable/NetworkInterface/board_family/NetworkInterface.c
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244
Test_project_for_GD32107C-EVAL.uvguix.right
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Test_project_for_GD32107C-EVAL.uvoptx
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@ -666,8 +879,8 @@
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@ -683,7 +896,7 @@
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18
Test_project_for_GD32107C-EVAL.uvprojx
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@ -526,9 +526,9 @@
<FilePath>.\FreeRTOS\source\portable\NetworkInterface\board_family\NetworkInterface.c</FilePath> <FilePath>.\FreeRTOS\source\portable\NetworkInterface\board_family\NetworkInterface.c</FilePath>
</File> </File>
<File> <File>
<FileName>BufferAllocation_1.c</FileName> <FileName>BufferAllocation_2.c</FileName>
<FileType>1</FileType> <FileType>1</FileType>
<FilePath>.\FreeRTOS\source\portable\BufferManagement\BufferAllocation_1.c</FilePath> <FilePath>.\FreeRTOS\source\portable\BufferManagement\BufferAllocation_2.c</FilePath>
</File> </File>
</Files> </Files>
</Group> </Group>
@ -972,6 +972,12 @@
<targetInfo name="Target 1"/> <targetInfo name="Target 1"/>
</targetInfos> </targetInfos>
</component> </component>
<component Cclass="Device" Cgroup="GD32F10x_StdPeripherals" Csub="DMA" Cvendor="GigaDevice" Cversion="2.0.2" condition="GD32F10x STDPERIPHERALS RCU">
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<component Cclass="Device" Cgroup="GD32F10x_StdPeripherals" Csub="ENET" Cvendor="GigaDevice" Cversion="2.0.2" condition="GD32F10x STDPERIPHERALS RCU"> <component Cclass="Device" Cgroup="GD32F10x_StdPeripherals" Csub="ENET" Cvendor="GigaDevice" Cversion="2.0.2" condition="GD32F10x STDPERIPHERALS RCU">
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@ -1060,6 +1066,14 @@
<package name="GD32F10x_DFP" schemaVersion="1.2" url="https://gd32mcu.com/data/documents/pack/" vendor="GigaDevice" version="2.0.3"/> <package name="GD32F10x_DFP" schemaVersion="1.2" url="https://gd32mcu.com/data/documents/pack/" vendor="GigaDevice" version="2.0.3"/>
<targetInfos/> <targetInfos/>
</file> </file>
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<instance index="0">RTE\Device\GD32F107VC\gd32f10x_dma.c</instance>
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<file attr="config" category="source" name="Device\Firmware\Peripherals\src\gd32f10x_enet.c" version="2.0.2"> <file attr="config" category="source" name="Device\Firmware\Peripherals\src\gd32f10x_enet.c" version="2.0.2">
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<component Cclass="Device" Cgroup="GD32F10x_StdPeripherals" Csub="ENET" Cvendor="GigaDevice" Cversion="2.0.2" condition="GD32F10x STDPERIPHERALS RCU"/> <component Cclass="Device" Cgroup="GD32F10x_StdPeripherals" Csub="ENET" Cvendor="GigaDevice" Cversion="2.0.2" condition="GD32F10x STDPERIPHERALS RCU"/>