diff --git a/FreeRTOS/source/include/NetworkInterface.h b/FreeRTOS/source/include/NetworkInterface.h index f7544b1..5a45636 100644 --- a/FreeRTOS/source/include/NetworkInterface.h +++ b/FreeRTOS/source/include/NetworkInterface.h @@ -28,309 +28,314 @@ #ifndef NETWORK_INTERFACE_H #define NETWORK_INTERFACE_H -#include "FreeRTOS.h" -#include "FreeRTOSIPConfig.h" -#include "stdio.h" -#include "stdint.h" +//#include "FreeRTOS.h" +//#include "FreeRTOSIPConfig.h" +//#include "stdio.h" +//#include "stdint.h" +#include "FreeRTOS_IP.h" +#include "Driver_ETH_MAC.h" /* *INDENT-OFF* */ #ifdef __cplusplus extern "C" { #endif -/* *INDENT-ON* */ -/** - * @brief HAL State structures definition - */ - typedef enum - { - HAL_ETH_STATE_RESET = 0x00U, /*!< Peripheral not yet Initialized or disabled */ - HAL_ETH_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ - HAL_ETH_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ - HAL_ETH_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */ - HAL_ETH_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ - HAL_ETH_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */ - HAL_ETH_STATE_BUSY_WR = 0x42U, /*!< Write process is ongoing */ - HAL_ETH_STATE_BUSY_RD = 0x82U, /*!< Read process is ongoing */ - HAL_ETH_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ - HAL_ETH_STATE_ERROR = 0x04U /*!< Reception process is ongoing */ - } HAL_ETH_StateTypeDef; - -/** - * @brief ETH Init Structure definition - */ - -typedef struct -{ - uint32_t AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY - * The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps) - * and the mode (half/full-duplex). - * This parameter can be a value of @ref ETH_AutoNegotiation */ - - uint32_t Speed; /*!< Sets the Ethernet speed: 10/100 Mbps. - * This parameter can be a value of @ref ETH_Speed */ - - uint32_t DuplexMode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode - * This parameter can be a value of @ref ETH_Duplex_Mode */ - - uint16_t PhyAddress; /*!< Ethernet PHY address. - * This parameter must be a number between Min_Data = 0 and Max_Data = 32 */ - - uint8_t * MACAddr; /*!< MAC Address of used Hardware: must be pointer on an array of 6 bytes */ - - uint32_t RxMode; /*!< Selects the Ethernet Rx mode: Polling mode, Interrupt mode. - * This parameter can be a value of @ref ETH_Rx_Mode */ - - uint32_t ChecksumMode; /*!< Selects if the checksum is check by hardware or by software. - * This parameter can be a value of @ref ETH_Checksum_Mode */ - - uint32_t MediaInterface; /*!< Selects the media-independent interface or the reduced media-independent interface. - * This parameter can be a value of @ref ETH_Media_Interface */ -} ETH_InitTypeDef; - - -/** - * @brief ETH MAC Configuration Structure definition - */ - -typedef struct -{ - uint32_t Watchdog; /*!< Selects or not the Watchdog timer - * When enabled, the MAC allows no more then 2048 bytes to be received. - * When disabled, the MAC can receive up to 16384 bytes. - * This parameter can be a value of @ref ETH_Watchdog */ - - uint32_t Jabber; /*!< Selects or not Jabber timer - * When enabled, the MAC allows no more then 2048 bytes to be sent. - * When disabled, the MAC can send up to 16384 bytes. - * This parameter can be a value of @ref ETH_Jabber */ - - uint32_t InterFrameGap; /*!< Selects the minimum IFG between frames during transmission. - * This parameter can be a value of @ref ETH_Inter_Frame_Gap */ - - uint32_t CarrierSense; /*!< Selects or not the Carrier Sense. - * This parameter can be a value of @ref ETH_Carrier_Sense */ - - uint32_t ReceiveOwn; /*!< Selects or not the ReceiveOwn, - * ReceiveOwn allows the reception of frames when the TX_EN signal is asserted - * in Half-Duplex mode. - * This parameter can be a value of @ref ETH_Receive_Own */ - - uint32_t LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode. - * This parameter can be a value of @ref ETH_Loop_Back_Mode */ - - uint32_t ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers. - * This parameter can be a value of @ref ETH_Checksum_Offload */ - - uint32_t RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL, - * when a collision occurs (Half-Duplex mode). - * This parameter can be a value of @ref ETH_Retry_Transmission */ - - uint32_t AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping. - * This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */ - - uint32_t BackOffLimit; /*!< Selects the BackOff limit value. - * This parameter can be a value of @ref ETH_Back_Off_Limit */ - - uint32_t DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode). - * This parameter can be a value of @ref ETH_Deferral_Check */ - - uint32_t ReceiveAll; /*!< Selects or not all frames reception by the MAC (No filtering). - * This parameter can be a value of @ref ETH_Receive_All */ - - uint32_t SourceAddrFilter; /*!< Selects the Source Address Filter mode. - * This parameter can be a value of @ref ETH_Source_Addr_Filter */ - - uint32_t PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames) - * This parameter can be a value of @ref ETH_Pass_Control_Frames */ - - uint32_t BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames. - * This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */ - - uint32_t DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames. - * This parameter can be a value of @ref ETH_Destination_Addr_Filter */ - - uint32_t PromiscuousMode; /*!< Selects or not the Promiscuous Mode - * This parameter can be a value of @ref ETH_Promiscuous_Mode */ - - uint32_t MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter. - * This parameter can be a value of @ref ETH_Multicast_Frames_Filter */ - - uint32_t UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter. - * This parameter can be a value of @ref ETH_Unicast_Frames_Filter */ - - uint32_t HashTableHigh; /*!< This field holds the higher 32 bits of Hash table. - * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */ - - uint32_t HashTableLow; /*!< This field holds the lower 32 bits of Hash table. - * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */ - - uint32_t PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame. - * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFF */ - - uint32_t ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames. - * This parameter can be a value of @ref ETH_Zero_Quanta_Pause */ - - uint32_t PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for - * automatic retransmission of PAUSE Frame. - * This parameter can be a value of @ref ETH_Pause_Low_Threshold */ - - uint32_t UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0 - * unicast address and unique multicast address). - * This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */ - - uint32_t ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and - * disable its transmitter for a specified time (Pause Time) - * This parameter can be a value of @ref ETH_Receive_Flow_Control */ - - uint32_t TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode) - * or the MAC back-pressure operation (Half-Duplex mode) - * This parameter can be a value of @ref ETH_Transmit_Flow_Control */ - - uint32_t VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for - * comparison and filtering. - * This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */ - - uint32_t VLANTagIdentifier; /*!< Holds the VLAN tag identifier for receive frames */ -} ETH_MACInitTypeDef; - - -/** - * @brief ETH DMA Configuration Structure definition - */ - -typedef struct -{ - uint32_t DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames. - * This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */ - - uint32_t ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode. - * This parameter can be a value of @ref ETH_Receive_Store_Forward */ - - uint32_t FlushReceivedFrame; /*!< Enables or disables the flushing of received frames. - * This parameter can be a value of @ref ETH_Flush_Received_Frame */ - - uint32_t TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode. - * This parameter can be a value of @ref ETH_Transmit_Store_Forward */ - - uint32_t TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control. - * This parameter can be a value of @ref ETH_Transmit_Threshold_Control */ - - uint32_t ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames. - * This parameter can be a value of @ref ETH_Forward_Error_Frames */ - - uint32_t ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error - * and length less than 64 bytes) including pad-bytes and CRC) - * This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */ - - uint32_t ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO. - * This parameter can be a value of @ref ETH_Receive_Threshold_Control */ - - uint32_t SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second - * frame of Transmit data even before obtaining the status for the first frame. - * This parameter can be a value of @ref ETH_Second_Frame_Operate */ - - uint32_t AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats. - * This parameter can be a value of @ref ETH_Address_Aligned_Beats */ - - uint32_t FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers. - * This parameter can be a value of @ref ETH_Fixed_Burst */ - - uint32_t RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction. - * This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */ - - uint32_t TxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Tx DMA transaction. - * This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */ - - uint32_t EnhancedDescriptorFormat; /*!< Enables the enhanced descriptor format. - * This parameter can be a value of @ref ETH_DMA_Enhanced_descriptor_format */ - - uint32_t DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode) - * This parameter must be a number between Min_Data = 0 and Max_Data = 32 */ - - uint32_t DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration. - * This parameter can be a value of @ref ETH_DMA_Arbitration */ -} ETH_DMAInitTypeDef; - - -/** - * @brief ETH DMA Descriptors data structure definition - */ - -typedef struct -{ - volatile uint32_t Status; /*!< Status */ - - uint32_t ControlBufferSize; /*!< Control and Buffer1, Buffer2 lengths */ - - uint32_t Buffer1Addr; /*!< Buffer1 address pointer */ - - uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */ - - /*!< Enhanced Ethernet DMA PTP Descriptors */ - uint32_t ExtendedStatus; /*!< Extended status for PTP receive descriptor */ - - uint32_t Reserved1; /*!< Reserved */ - - uint32_t TimeStampLow; /*!< Time Stamp Low value for transmit and receive */ - - uint32_t TimeStampHigh; /*!< Time Stamp High value for transmit and receive */ -} ETH_DMADescTypeDef; - - -/** - * @brief Received Frame Informations structure definition - */ -typedef struct -{ - ETH_DMADescTypeDef * FSRxDesc; /*!< First Segment Rx Desc */ - - ETH_DMADescTypeDef * LSRxDesc; /*!< Last Segment Rx Desc */ - - uint32_t SegCount; /*!< Segment count */ - - uint32_t length; /*!< Frame length */ - - uint32_t buffer; /*!< Frame buffer */ -} ETH_DMARxFrameInfos; - -#define ETH_TypeDef void -/** - * @brief ETH Handle Structure definition - */ - -typedef struct -{ - ETH_TypeDef * Instance; /*!< Register base address */ - - ETH_InitTypeDef Init; /*!< Ethernet Init Configuration */ - - uint32_t LinkStatus; /*!< Ethernet link status */ - - ETH_DMADescTypeDef * RxDesc; /*!< Rx descriptor to Get */ - - ETH_DMADescTypeDef * TxDesc; /*!< Tx descriptor to Set */ - - ETH_DMARxFrameInfos RxFrameInfos; /*!< last Rx frame infos */ - - volatile HAL_ETH_StateTypeDef State; /*!< ETH communication state */ - - HAL_LockTypeDef Lock; /*!< ETH Lock */ -} ETH_HandleTypeDef; -/* INTERNAL API FUNCTIONS. */ BaseType_t xNetworkInterfaceInitialise( void ); -BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxNetworkBuffer, - BaseType_t xReleaseAfterSend ); - -/* The following function is defined only when BufferAllocation_1.c is linked in the project. */ -void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] ); - -/* The following function is defined only when BufferAllocation_1.c is linked in the project. */ -BaseType_t xGetPhyLinkStatus( void ); - -/* *INDENT-OFF* */ -#ifdef __cplusplus - } /* extern "C" */ -#endif +BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxDescriptor,BaseType_t xReleaseAfterSend ); /* *INDENT-ON* */ +///** +// * @brief HAL State structures definition +// */ +// typedef enum +// { +// HAL_ETH_STATE_RESET = 0x00U, /*!< Peripheral not yet Initialized or disabled */ +// HAL_ETH_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ +// HAL_ETH_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ +// HAL_ETH_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */ +// HAL_ETH_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ +// HAL_ETH_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */ +// HAL_ETH_STATE_BUSY_WR = 0x42U, /*!< Write process is ongoing */ +// HAL_ETH_STATE_BUSY_RD = 0x82U, /*!< Read process is ongoing */ +// HAL_ETH_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ +// HAL_ETH_STATE_ERROR = 0x04U /*!< Reception process is ongoing */ +// } HAL_ETH_StateTypeDef; +// +///** +// * @brief ETH Init Structure definition +// */ + +//typedef struct +//{ +// uint32_t AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY +// * The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps) +// * and the mode (half/full-duplex). +// * This parameter can be a value of @ref ETH_AutoNegotiation */ + +// uint32_t Speed; /*!< Sets the Ethernet speed: 10/100 Mbps. +// * This parameter can be a value of @ref ETH_Speed */ + +// uint32_t DuplexMode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode +// * This parameter can be a value of @ref ETH_Duplex_Mode */ + +// uint16_t PhyAddress; /*!< Ethernet PHY address. +// * This parameter must be a number between Min_Data = 0 and Max_Data = 32 */ + +// uint8_t * MACAddr; /*!< MAC Address of used Hardware: must be pointer on an array of 6 bytes */ + +// uint32_t RxMode; /*!< Selects the Ethernet Rx mode: Polling mode, Interrupt mode. +// * This parameter can be a value of @ref ETH_Rx_Mode */ + +// uint32_t ChecksumMode; /*!< Selects if the checksum is check by hardware or by software. +// * This parameter can be a value of @ref ETH_Checksum_Mode */ + +// uint32_t MediaInterface; /*!< Selects the media-independent interface or the reduced media-independent interface. +// * This parameter can be a value of @ref ETH_Media_Interface */ +//} ETH_InitTypeDef; + + +///** +// * @brief ETH MAC Configuration Structure definition +// */ + +//typedef struct +//{ +// uint32_t Watchdog; /*!< Selects or not the Watchdog timer +// * When enabled, the MAC allows no more then 2048 bytes to be received. +// * When disabled, the MAC can receive up to 16384 bytes. +// * This parameter can be a value of @ref ETH_Watchdog */ + +// uint32_t Jabber; /*!< Selects or not Jabber timer +// * When enabled, the MAC allows no more then 2048 bytes to be sent. +// * When disabled, the MAC can send up to 16384 bytes. +// * This parameter can be a value of @ref ETH_Jabber */ + +// uint32_t InterFrameGap; /*!< Selects the minimum IFG between frames during transmission. +// * This parameter can be a value of @ref ETH_Inter_Frame_Gap */ + +// uint32_t CarrierSense; /*!< Selects or not the Carrier Sense. +// * This parameter can be a value of @ref ETH_Carrier_Sense */ + +// uint32_t ReceiveOwn; /*!< Selects or not the ReceiveOwn, +// * ReceiveOwn allows the reception of frames when the TX_EN signal is asserted +// * in Half-Duplex mode. +// * This parameter can be a value of @ref ETH_Receive_Own */ + +// uint32_t LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode. +// * This parameter can be a value of @ref ETH_Loop_Back_Mode */ + +// uint32_t ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers. +// * This parameter can be a value of @ref ETH_Checksum_Offload */ + +// uint32_t RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL, +// * when a collision occurs (Half-Duplex mode). +// * This parameter can be a value of @ref ETH_Retry_Transmission */ + +// uint32_t AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping. +// * This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */ + +// uint32_t BackOffLimit; /*!< Selects the BackOff limit value. +// * This parameter can be a value of @ref ETH_Back_Off_Limit */ + +// uint32_t DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode). +// * This parameter can be a value of @ref ETH_Deferral_Check */ + +// uint32_t ReceiveAll; /*!< Selects or not all frames reception by the MAC (No filtering). +// * This parameter can be a value of @ref ETH_Receive_All */ + +// uint32_t SourceAddrFilter; /*!< Selects the Source Address Filter mode. +// * This parameter can be a value of @ref ETH_Source_Addr_Filter */ + +// uint32_t PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames) +// * This parameter can be a value of @ref ETH_Pass_Control_Frames */ + +// uint32_t BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames. +// * This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */ + +// uint32_t DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames. +// * This parameter can be a value of @ref ETH_Destination_Addr_Filter */ + +// uint32_t PromiscuousMode; /*!< Selects or not the Promiscuous Mode +// * This parameter can be a value of @ref ETH_Promiscuous_Mode */ + +// uint32_t MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter. +// * This parameter can be a value of @ref ETH_Multicast_Frames_Filter */ + +// uint32_t UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter. +// * This parameter can be a value of @ref ETH_Unicast_Frames_Filter */ + +// uint32_t HashTableHigh; /*!< This field holds the higher 32 bits of Hash table. +// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */ + +// uint32_t HashTableLow; /*!< This field holds the lower 32 bits of Hash table. +// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */ + +// uint32_t PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame. +// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFF */ + +// uint32_t ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames. +// * This parameter can be a value of @ref ETH_Zero_Quanta_Pause */ + +// uint32_t PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for +// * automatic retransmission of PAUSE Frame. +// * This parameter can be a value of @ref ETH_Pause_Low_Threshold */ + +// uint32_t UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0 +// * unicast address and unique multicast address). +// * This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */ + +// uint32_t ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and +// * disable its transmitter for a specified time (Pause Time) +// * This parameter can be a value of @ref ETH_Receive_Flow_Control */ + +// uint32_t TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode) +// * or the MAC back-pressure operation (Half-Duplex mode) +// * This parameter can be a value of @ref ETH_Transmit_Flow_Control */ + +// uint32_t VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for +// * comparison and filtering. +// * This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */ + +// uint32_t VLANTagIdentifier; /*!< Holds the VLAN tag identifier for receive frames */ +//} ETH_MACInitTypeDef; + + +///** +// * @brief ETH DMA Configuration Structure definition +// */ + +//typedef struct +//{ +// uint32_t DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames. +// * This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */ + +// uint32_t ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode. +// * This parameter can be a value of @ref ETH_Receive_Store_Forward */ + +// uint32_t FlushReceivedFrame; /*!< Enables or disables the flushing of received frames. +// * This parameter can be a value of @ref ETH_Flush_Received_Frame */ + +// uint32_t TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode. +// * This parameter can be a value of @ref ETH_Transmit_Store_Forward */ + +// uint32_t TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control. +// * This parameter can be a value of @ref ETH_Transmit_Threshold_Control */ + +// uint32_t ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames. +// * This parameter can be a value of @ref ETH_Forward_Error_Frames */ + +// uint32_t ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error +// * and length less than 64 bytes) including pad-bytes and CRC) +// * This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */ + +// uint32_t ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO. +// * This parameter can be a value of @ref ETH_Receive_Threshold_Control */ + +// uint32_t SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second +// * frame of Transmit data even before obtaining the status for the first frame. +// * This parameter can be a value of @ref ETH_Second_Frame_Operate */ + +// uint32_t AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats. +// * This parameter can be a value of @ref ETH_Address_Aligned_Beats */ + +// uint32_t FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers. +// * This parameter can be a value of @ref ETH_Fixed_Burst */ + +// uint32_t RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction. +// * This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */ + +// uint32_t TxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Tx DMA transaction. +// * This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */ + +// uint32_t EnhancedDescriptorFormat; /*!< Enables the enhanced descriptor format. +// * This parameter can be a value of @ref ETH_DMA_Enhanced_descriptor_format */ + +// uint32_t DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode) +// * This parameter must be a number between Min_Data = 0 and Max_Data = 32 */ + +// uint32_t DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration. +// * This parameter can be a value of @ref ETH_DMA_Arbitration */ +//} ETH_DMAInitTypeDef; + + +///** +// * @brief ETH DMA Descriptors data structure definition +// */ + +//typedef struct +//{ +// volatile uint32_t Status; /*!< Status */ + +// uint32_t ControlBufferSize; /*!< Control and Buffer1, Buffer2 lengths */ + +// uint32_t Buffer1Addr; /*!< Buffer1 address pointer */ + +// uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */ + +// /*!< Enhanced Ethernet DMA PTP Descriptors */ +// uint32_t ExtendedStatus; /*!< Extended status for PTP receive descriptor */ + +// uint32_t Reserved1; /*!< Reserved */ + +// uint32_t TimeStampLow; /*!< Time Stamp Low value for transmit and receive */ + +// uint32_t TimeStampHigh; /*!< Time Stamp High value for transmit and receive */ +//} ETH_DMADescTypeDef; + + +///** +// * @brief Received Frame Informations structure definition +// */ +//typedef struct +//{ +// ETH_DMADescTypeDef * FSRxDesc; /*!< First Segment Rx Desc */ + +// ETH_DMADescTypeDef * LSRxDesc; /*!< Last Segment Rx Desc */ + +// uint32_t SegCount; /*!< Segment count */ + +// uint32_t length; /*!< Frame length */ + +// uint32_t buffer; /*!< Frame buffer */ +//} ETH_DMARxFrameInfos; + +//#define ETH_TypeDef void +///** +// * @brief ETH Handle Structure definition +// */ + +//typedef struct +//{ +// ETH_TypeDef * Instance; /*!< Register base address */ + +// ETH_InitTypeDef Init; /*!< Ethernet Init Configuration */ + +// uint32_t LinkStatus; /*!< Ethernet link status */ + +// ETH_DMADescTypeDef * RxDesc; /*!< Rx descriptor to Get */ + +// ETH_DMADescTypeDef * TxDesc; /*!< Tx descriptor to Set */ + +// ETH_DMARxFrameInfos RxFrameInfos; /*!< last Rx frame infos */ + +// volatile HAL_ETH_StateTypeDef State; /*!< ETH communication state */ + +// HAL_LockTypeDef Lock; /*!< ETH Lock */ +//} ETH_HandleTypeDef; +///* INTERNAL API FUNCTIONS. */ +//BaseType_t xNetworkInterfaceInitialise( void ); +//BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxNetworkBuffer, +// BaseType_t xReleaseAfterSend ); + +///* The following function is defined only when BufferAllocation_1.c is linked in the project. */ +//void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] ); + +///* The following function is defined only when BufferAllocation_1.c is linked in the project. */ +//BaseType_t xGetPhyLinkStatus( void ); + +///* *INDENT-OFF* */ +//#ifdef __cplusplus +// } /* extern "C" */ +//#endif +///* *INDENT-ON* */ + #endif /* NETWORK_INTERFACE_H */ diff --git a/FreeRTOS/source/portable/NetworkInterface/board_family/NetworkInterface.c b/FreeRTOS/source/portable/NetworkInterface/board_family/NetworkInterface.c index 4cd5c00..c0f7367 100644 --- a/FreeRTOS/source/portable/NetworkInterface/board_family/NetworkInterface.c +++ b/FreeRTOS/source/portable/NetworkInterface/board_family/NetworkInterface.c @@ -1,44 +1,1430 @@ +///* +// * FreeRTOS+TCP V3.1.0 +// * Copyright (C) 2022 Amazon.com, Inc. or its affiliates. All Rights Reserved. +// * +// * SPDX-License-Identifier: MIT +// * +// * Permission is hereby granted, free of charge, to any person obtaining a copy of +// * this software and associated documentation files (the "Software"), to deal in +// * the Software without restriction, including without limitation the rights to +// * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of +// * the Software, and to permit persons to whom the Software is furnished to do so, +// * subject to the following conditions: +// * +// * The above copyright notice and this permission notice shall be included in all +// * copies or substantial portions of the Software. +// * +// * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +// * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +// * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR +// * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER +// * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN +// * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +// * +// * http://aws.amazon.com/freertos +// * http://www.FreeRTOS.org +// */ + +///***************************************************************************** +//* Note: This file is Not! to be used as is. The purpose of this file is to provide +//* a template for writing a network interface. Each network interface will have to provide +//* concrete implementations of the functions in this file. +//* +//* See the following URL for an explanation of this file and its functions: +//* https://freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/Embedded_Ethernet_Porting.html +//* +//*****************************************************************************/ + +///* Standard includes. */ +//#include +//#include +//#include + +///* FreeRTOS includes. */ +//#include "FreeRTOS.h" +//#include "task.h" +//#include "queue.h" +//#include "semphr.h" + +///* FreeRTOS+TCP includes. */ +//#include "FreeRTOS_IP.h" +//#include "FreeRTOS_Sockets.h" +//#include "FreeRTOS_IP_Private.h" +//#include "FreeRTOS_DNS.h" +//#include "FreeRTOS_ARP.h" +//#include "NetworkBufferManagement.h" +//#include "NetworkInterface.h" +//#include "phyHandling.h" + +////#include "stm32fxx_hal_eth.h" + +///*#include "Driver_ETH.h" +//#include "Driver_ETH_MAC.h" +//#include "Driver_ETH_PHY.h"*/ +///* If ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES is set to 1, then the Ethernet +// * driver will filter incoming packets and only pass the stack those packets it +// * considers need processing. */ +//#if ( ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES == 0 ) +// #define ipCONSIDER_FRAME_FOR_PROCESSING( pucEthernetBuffer ) eProcessBuffer +//#else +// #define ipCONSIDER_FRAME_FOR_PROCESSING( pucEthernetBuffer ) eConsiderFrameForProcessing( ( pucEthernetBuffer ) ) +//#endif + + +//BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxNetworkBuffer, +// BaseType_t xReleaseAfterSend ) +//{ +// /* FIX ME. */ +// return pdFALSE; +//} + +//void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] ) +//{ +// /* FIX ME. */ +//} + +//BaseType_t xGetPhyLinkStatus( void ) +//{ +// /* FIX ME. */ +// return pdFALSE; +//} + + + + +///* ST includes. */ +//#if defined( GD32F10X_CL ) +// #include "gd32f10x_enet.h" +//#elif defined( STM32F7xx ) +// #include "stm32f7xx_hal.h" +// #define CACHE_LINE_SIZE 32u +//#elif defined( STM32F4xx ) +// #include "stm32f4xx_hal.h" +//#elif defined( STM32F2xx ) +// #include "stm32f2xx_hal.h" +//#elif defined( STM32F1xx ) +// #include "stm32f1xx_hal.h" +//#elif !defined( _lint ) /* Lint does not like an #error */ +// #error What part? +//#endif /* if defined( GD32F10X_CL ) */ + + +///* Interrupt events to process. Currently only the Rx event is processed +// * although code for other events is included to allow for possible future +// * expansion. */ +//#define EMAC_IF_RX_EVENT 1UL +//#define EMAC_IF_TX_EVENT 2UL +//#define EMAC_IF_ERR_EVENT 4UL +//#define EMAC_IF_ALL_EVENT ( EMAC_IF_RX_EVENT | EMAC_IF_TX_EVENT | EMAC_IF_ERR_EVENT ) + +///* Calculate the maximum packet size that the DMA can receive. */ +//#define EMAC_DMA_BUFFER_SIZE ( ( uint32_t ) ( ETH_MAX_PACKET_SIZE - ipBUFFER_PADDING ) ) + +//#define ETH_DMA_ALL_INTS \ +// ( ETH_DMA_IT_TST | ETH_DMA_IT_PMT | ETH_DMA_IT_MMC | ETH_DMA_IT_NIS | \ +// ETH_DMA_IT_AIS | ETH_DMA_IT_ER | ETH_DMA_IT_FBE | ETH_DMA_IT_RWT | \ +// ETH_DMA_IT_RPS | ETH_DMA_IT_RBU | ETH_DMA_IT_R | ETH_DMA_IT_TU | \ +// ETH_DMA_IT_RO | ETH_DMA_IT_TJT | ETH_DMA_IT_TPS | ETH_DMA_IT_T ) + +//#ifndef NETWORK_BUFFER_HEADER_SIZE +// #define NETWORK_BUFFER_HEADER_SIZE ( ipBUFFER_PADDING ) +//#endif + +//#ifndef niEMAC_HANDLER_TASK_PRIORITY +// #define niEMAC_HANDLER_TASK_PRIORITY configMAX_PRIORITIES - 1 +//#endif + +//#if ( ( ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM == 0 ) || ( ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM == 0 ) ) +// #warning Consider enabling checksum offloading +//#endif + +//#ifndef niDESCRIPTOR_WAIT_TIME_MS +// #define niDESCRIPTOR_WAIT_TIME_MS 250uL +//#endif + +///* +// * Most users will want a PHY that negotiates about +// * the connection properties: speed, dmix and duplex. +// * On some rare cases, you want to select what is being +// * advertised, properties like MDIX and duplex. +// */ + +//#if !defined( ipconfigETHERNET_AN_ENABLE ) +// /* Enable auto-negotiation */ +// #define ipconfigETHERNET_AN_ENABLE 1 +//#endif + +//#if !defined( ipconfigETHERNET_AUTO_CROSS_ENABLE ) +// #define ipconfigETHERNET_AUTO_CROSS_ENABLE 1 +//#endif + +//#if ( ipconfigETHERNET_AN_ENABLE == 0 ) + +///* +// * The following three defines are only used in case there +// * is no auto-negotiation. +// */ +// #if !defined( ipconfigETHERNET_CROSSED_LINK ) +// #define ipconfigETHERNET_CROSSED_LINK 1 +// #endif + +// #if !defined( ipconfigETHERNET_USE_100MB ) +// #define ipconfigETHERNET_USE_100MB 1 +// #endif + +// #if !defined( ipconfigETHERNET_USE_FULL_DUPLEX ) +// #define ipconfigETHERNET_USE_FULL_DUPLEX 1 +// #endif +//#endif /* ipconfigETHERNET_AN_ENABLE == 0 */ + +///* Default the size of the stack used by the EMAC deferred handler task to twice +// * the size of the stack used by the idle task - but allow this to be overridden in +// * FreeRTOSConfig.h as configMINIMAL_STACK_SIZE is a user definable constant. */ +//#ifndef configEMAC_TASK_STACK_SIZE +// #define configEMAC_TASK_STACK_SIZE ( 2 * configMINIMAL_STACK_SIZE ) +//#endif + +///* Two choices must be made: RMII versus MII, +// * and the index of the PHY in use ( between 0 and 31 ). */ +//#ifndef ipconfigUSE_RMII +// #ifdef GD32F10X_CL +// #define ipconfigUSE_RMII 1 +// #warning Using RMII, make sure if this is correct +// #else +// #define ipconfigUSE_RMII 0 +// #warning Using MII, make sure if this is correct +// #endif /* GD32F10X_CL */ +//#endif /* ipconfigUSE_RMII */ + +//typedef enum +//{ +// eMACInit, /* Must initialise MAC. */ +// eMACPass, /* Initialisation was successful. */ +// eMACFailed, /* Initialisation failed. */ +//} eMAC_INIT_STATUS_TYPE; + +//static eMAC_INIT_STATUS_TYPE xMacInitStatus = eMACInit; + +///*-----------------------------------------------------------*/ + +///* +// * A deferred interrupt handler task that processes +// */ +//static void prvEMACHandlerTask( void * pvParameters ); + +///* +// * Force a negotiation with the Switch or Router and wait for LS. +// */ +//static void prvEthernetUpdateConfig( BaseType_t xForce ); + +///* +// * See if there is a new packet and forward it to the IP-task. +// */ +//static BaseType_t prvNetworkInterfaceInput( void ); + +//#if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_MDNS != 0 ) + +///* +// * For LLMNR, an extra MAC-address must be configured to +// * be able to receive the multicast messages. +// */ +// static void prvMACAddressConfig( ETH_HandleTypeDef * heth, +// uint32_t ulIndex, +// uint8_t * Addr ); +//#endif + +///* +// * Check if a given packet should be accepted. +// */ +//static BaseType_t xMayAcceptPacket( uint8_t * pucEthernetBuffer ); + +///* +// * Initialise the TX descriptors. +// */ +//static void prvDMATxDescListInit( void ); + +///* +// * Initialise the RX descriptors. +// */ +//static void prvDMARxDescListInit( void ); + +///* After packets have been sent, the network +// * buffers will be released. */ +//static void vClearTXBuffers( void ); + +///*-----------------------------------------------------------*/ + +//#if ( ipconfigUSE_LLMNR == 1 ) +// static const uint8_t xLLMNR_MACAddress[] = { 0x01, 0x00, 0x5E, 0x00, 0x00, 0xFC }; +//#endif + +//static EthernetPhy_t xPhyObject; + +///* Ethernet handle. */ +//static ETH_HandleTypeDef xETH; + +///* xTXDescriptorSemaphore is a counting semaphore with +// * a maximum count of ETH_TXBUFNB, which is the number of +// * DMA TX descriptors. */ +//static SemaphoreHandle_t xTXDescriptorSemaphore = NULL; + +///* +// * Note: it is advised to define both +// * +// * #define ipconfigZERO_COPY_RX_DRIVER 1 +// * #define ipconfigZERO_COPY_TX_DRIVER 1 +// * +// * The method using memcpy is slower and probably uses more RAM memory. +// * The possibility is left in the code just for comparison. +// * +// * It is advised to define ETH_TXBUFNB at least 4. Note that no +// * TX buffers are allocated in a zero-copy driver. +// */ +///* MAC buffers: ---------------------------------------------------------*/ + +///* Put the DMA descriptors in '.first_data'. +// * This is important for STM32F7, which has an L1 data cache. +// * The first 64KB of the SRAM is not cached. +// * See README.TXT in this folder. */ + +///* Ethernet Rx MA Descriptor */ +//__attribute__( ( aligned( 32 ) ) ) +//#if defined( STM32F7xx ) +// __attribute__( ( section( ".first_data" ) ) ) +//#endif +//ETH_DMADescTypeDef DMARxDscrTab[ ETH_RXBUFNB ]; + +//#if ( ipconfigZERO_COPY_RX_DRIVER == 0 ) +// /* Ethernet Receive Buffer */ +// __ALIGN_BEGIN uint8_t Rx_Buff[ ETH_RXBUFNB ][ ETH_RX_BUF_SIZE ] __ALIGN_END; +//#endif + +///* Ethernet Tx DMA Descriptor */ +//__attribute__( ( aligned( 32 ) ) ) +//#if defined( STM32F7xx ) +// __attribute__( ( section( ".first_data" ) ) ) +//#endif +//ETH_DMADescTypeDef DMATxDscrTab[ ETH_TXBUFNB ]; + +//#if ( ipconfigZERO_COPY_TX_DRIVER == 0 ) +// /* Ethernet Transmit Buffer */ +// __ALIGN_BEGIN uint8_t Tx_Buff[ ETH_TXBUFNB ][ ETH_TX_BUF_SIZE ] __ALIGN_END; +//#endif + +///* DMATxDescToClear points to the next TX DMA descriptor +// * that must be cleared by vClearTXBuffers(). */ +//static __IO ETH_DMADescTypeDef * DMATxDescToClear; + +///* Holds the handle of the task used as a deferred interrupt processor. The +// * handle is used so direct notifications can be sent to the task for all EMAC/DMA +// * related interrupts. */ +//static TaskHandle_t xEMACTaskHandle = NULL; + +///* For local use only: describe the PHY's properties: */ +//const PhyProperties_t xPHYProperties = +//{ +// #if ( ipconfigETHERNET_AN_ENABLE != 0 ) +// .ucSpeed = PHY_SPEED_AUTO, +// .ucDuplex = PHY_DUPLEX_AUTO, +// #else +// #if ( ipconfigETHERNET_USE_100MB != 0 ) +// .ucSpeed = PHY_SPEED_100, +// #else +// .ucSpeed = PHY_SPEED_10, +// #endif + +// #if ( ipconfigETHERNET_USE_FULL_DUPLEX != 0 ) +// .ucDuplex = PHY_DUPLEX_FULL, +// #else +// .ucDuplex = PHY_DUPLEX_HALF, +// #endif +// #endif /* if ( ipconfigETHERNET_AN_ENABLE != 0 ) */ + +// #if ( ipconfigETHERNET_AN_ENABLE != 0 ) && ( ipconfigETHERNET_AUTO_CROSS_ENABLE != 0 ) +// .ucMDI_X = PHY_MDIX_AUTO, +// #elif ( ipconfigETHERNET_CROSSED_LINK != 0 ) +// .ucMDI_X = PHY_MDIX_CROSSED, +// #else +// .ucMDI_X = PHY_MDIX_DIRECT, +// #endif +//}; + +///*-----------------------------------------------------------*/ + +//void HAL_ETH_RxCpltCallback( ETH_HandleTypeDef * heth ) +//{ +// BaseType_t xHigherPriorityTaskWoken = pdFALSE; + +// ( void ) heth; + +// /* Pass an RX-event and wakeup the prvEMACHandlerTask. */ +// if( xEMACTaskHandle != NULL ) +// { +// xTaskNotifyFromISR( xEMACTaskHandle, EMAC_IF_RX_EVENT, eSetBits, &( xHigherPriorityTaskWoken ) ); +// portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); +// } +//} +///*-----------------------------------------------------------*/ + +//void HAL_ETH_TxCpltCallback( ETH_HandleTypeDef * heth ) +//{ +// BaseType_t xHigherPriorityTaskWoken = pdFALSE; + +// ( void ) heth; + +// /* Pass a TX-event and wakeup the prvEMACHandlerTask. */ +// if( xEMACTaskHandle != NULL ) +// { +// xTaskNotifyFromISR( xEMACTaskHandle, EMAC_IF_TX_EVENT, eSetBits, &( xHigherPriorityTaskWoken ) ); +// portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); +// } +//} +///*-----------------------------------------------------------*/ + +//static void vClearTXBuffers() +//{ +// __IO ETH_DMADescTypeDef * txLastDescriptor = xETH.TxDesc; +// size_t uxCount = ( ( UBaseType_t ) ETH_TXBUFNB ) - uxSemaphoreGetCount( xTXDescriptorSemaphore ); + +// #if ( ipconfigZERO_COPY_TX_DRIVER != 0 ) +// NetworkBufferDescriptor_t * pxNetworkBuffer; +// uint8_t * ucPayLoad; +// #endif + +// /* This function is called after a TX-completion interrupt. +// * It will release each Network Buffer used in xNetworkInterfaceOutput(). +// * 'uxCount' represents the number of descriptors given to DMA for transmission. +// * After sending a packet, the DMA will clear the 'ETH_DMATXDESC_OWN' bit. */ +// while( ( uxCount > 0 ) && ( ( DMATxDescToClear->Status & ETH_DMATXDESC_OWN ) == 0 ) ) +// { +// if( ( DMATxDescToClear == txLastDescriptor ) && ( uxCount != ETH_TXBUFNB ) ) +// { +// break; +// } + +// #if ( ipconfigZERO_COPY_TX_DRIVER != 0 ) +// { +// ucPayLoad = ( uint8_t * ) DMATxDescToClear->Buffer1Addr; + +// if( ucPayLoad != NULL ) +// { +// pxNetworkBuffer = pxPacketBuffer_to_NetworkBuffer( ucPayLoad ); + +// if( pxNetworkBuffer != NULL ) +// { +// vReleaseNetworkBufferAndDescriptor( pxNetworkBuffer ); +// } + +// DMATxDescToClear->Buffer1Addr = ( uint32_t ) 0u; +// } +// } +// #endif /* ipconfigZERO_COPY_TX_DRIVER */ + +// DMATxDescToClear = ( ETH_DMADescTypeDef * ) ( DMATxDescToClear->Buffer2NextDescAddr ); + +// uxCount--; +// /* Tell the counting semaphore that one more TX descriptor is available. */ +// xSemaphoreGive( xTXDescriptorSemaphore ); +// } +//} +///*-----------------------------------------------------------*/ + +//BaseType_t xNetworkInterfaceInitialise( void ) +//{ +// HAL_StatusTypeDef hal_eth_init_status; +// BaseType_t xResult; + +// #if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_MDNS != 0 ) +// BaseType_t xMACEntry = ETH_MAC_ADDRESS1; /* ETH_MAC_ADDRESS0 reserved for the primary MAC-address. */ +// #endif + +// if( xMacInitStatus == eMACInit ) +// { +// xTXDescriptorSemaphore = xSemaphoreCreateCounting( ( UBaseType_t ) ETH_TXBUFNB, ( UBaseType_t ) ETH_TXBUFNB ); + +// if( xTXDescriptorSemaphore == NULL ) +// { +// xMacInitStatus = eMACFailed; +// } +// else +// { +// /* Initialise ETH */ + +// xETH.Instance = ETH; +// xETH.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE; +// xETH.Init.Speed = ETH_SPEED_100M; +// xETH.Init.DuplexMode = ETH_MODE_FULLDUPLEX; +// /* Value of PhyAddress doesn't matter, will be probed for. */ +// xETH.Init.PhyAddress = 0; + +// xETH.Init.MACAddr = ( uint8_t * ) FreeRTOS_GetMACAddress(); +// xETH.Init.RxMode = ETH_RXINTERRUPT_MODE; + +// #if ( ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM != 0 ) +// { +// /* using the ETH_CHECKSUM_BY_HARDWARE option: +// * both the IP and the protocol checksums will be calculated +// * by the peripheral. */ +// xETH.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE; +// } +// #else +// { +// xETH.Init.ChecksumMode = ETH_CHECKSUM_BY_SOFTWARE; +// } +// #endif + +// #if ( ipconfigUSE_RMII != 0 ) +// { +// xETH.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII; +// } +// #else +// { +// xETH.Init.MediaInterface = ETH_MEDIA_INTERFACE_MII; +// } +// #endif /* ipconfigUSE_RMII */ + +// hal_eth_init_status = HAL_ETH_Init( &xETH ); + +// /* Only for inspection by debugger. */ +// ( void ) hal_eth_init_status; + +// /* Set the TxDesc and RxDesc pointers. */ +// xETH.TxDesc = DMATxDscrTab; +// xETH.RxDesc = DMARxDscrTab; + +// /* Make sure that all unused fields are cleared. */ +// memset( &DMATxDscrTab, '\0', sizeof( DMATxDscrTab ) ); +// memset( &DMARxDscrTab, '\0', sizeof( DMARxDscrTab ) ); + +// /* Initialize Tx Descriptors list: Chain Mode */ +// DMATxDescToClear = DMATxDscrTab; + +// /* Initialise TX-descriptors. */ +// prvDMATxDescListInit(); + +// /* Initialise RX-descriptors. */ +// prvDMARxDescListInit(); + +// #if ( ipconfigUSE_MDNS == 1 ) +// { +// /* Program the MDNS address. */ +// prvMACAddressConfig( &xETH, xMACEntry, ( uint8_t * ) xMDNS_MACAddressIPv4 ); +// xMACEntry += 8; +// } +// #endif +// #if ( ipconfigUSE_LLMNR == 1 ) +// { +// /* Program the LLMNR address. */ +// prvMACAddressConfig( &xETH, xMACEntry, ( uint8_t * ) xLLMNR_MACAddress ); +// xMACEntry += 8; +// } +// #endif + +// /* Force a negotiation with the Switch or Router and wait for LS. */ +// prvEthernetUpdateConfig( pdTRUE ); + +// /* The deferred interrupt handler task is created at the highest +// * possible priority to ensure the interrupt handler can return directly +// * to it. The task's handle is stored in xEMACTaskHandle so interrupts can +// * notify the task when there is something to process. */ +// if( xTaskCreate( prvEMACHandlerTask, "EMAC", configEMAC_TASK_STACK_SIZE, NULL, niEMAC_HANDLER_TASK_PRIORITY, &xEMACTaskHandle ) == pdPASS ) +// { +// /* The xTXDescriptorSemaphore and the task are created successfully. */ +// xMacInitStatus = eMACPass; +// } +// else +// { +// xMacInitStatus = eMACFailed; +// } +// } +// } /* if( xMacInitStatus == eMACInit ) */ + +// if( xMacInitStatus != eMACPass ) +// { +// /* EMAC initialisation failed, return pdFAIL. */ +// xResult = pdFAIL; +// } +// else +// { +// if( xPhyObject.ulLinkStatusMask != 0U ) +// { +// xETH.Instance->DMAIER |= ETH_DMA_ALL_INTS; +// xResult = pdPASS; +// FreeRTOS_printf( ( "Link Status is high\n" ) ); +// } +// else +// { +// /* For now pdFAIL will be returned. But prvEMACHandlerTask() is running +// * and it will keep on checking the PHY and set 'ulLinkStatusMask' when necessary. */ +// xResult = pdFAIL; +// } +// } + +// /* When returning non-zero, the stack will become active and +// * start DHCP (in configured) */ +// return xResult; +//} +///*-----------------------------------------------------------*/ + +//static void prvDMATxDescListInit() +//{ +// ETH_DMADescTypeDef * pxDMADescriptor; +// BaseType_t xIndex; + +// /* Get the pointer on the first member of the descriptor list */ +// pxDMADescriptor = DMATxDscrTab; + +// /* Fill each DMA descriptor with the right values */ +// for( xIndex = 0; xIndex < ETH_TXBUFNB; xIndex++, pxDMADescriptor++ ) +// { +// /* Set Second Address Chained bit */ +// pxDMADescriptor->Status = ETH_DMATXDESC_TCH; + +// #if ( ipconfigZERO_COPY_TX_DRIVER == 0 ) +// { +// /* Set Buffer1 address pointer */ +// pxDMADescriptor->Buffer1Addr = ( uint32_t ) ( Tx_Buff[ xIndex ] ); +// } +// #endif + +// if( xETH.Init.ChecksumMode == ETH_CHECKSUM_BY_HARDWARE ) +// { +// /* Set the DMA Tx descriptors checksum insertion for TCP, UDP, and ICMP */ +// pxDMADescriptor->Status |= ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL; +// } +// else +// { +// pxDMADescriptor->Status &= ~( ( uint32_t ) ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL ); +// } + +// /* Initialize the next descriptor with the Next Descriptor Polling Enable */ +// if( xIndex < ETH_TXBUFNB - 1 ) +// { +// /* Set next descriptor address register with next descriptor base address */ +// pxDMADescriptor->Buffer2NextDescAddr = ( uint32_t ) ( pxDMADescriptor + 1 ); +// } +// else +// { +// /* For last descriptor, set next descriptor address register equal to the first descriptor base address */ +// pxDMADescriptor->Buffer2NextDescAddr = ( uint32_t ) DMATxDscrTab; +// } +// } + +// /* Set Transmit Descriptor List Address Register */ +// xETH.Instance->DMATDLAR = ( uint32_t ) DMATxDscrTab; +//} +///*-----------------------------------------------------------*/ + +//static void prvDMARxDescListInit() +//{ +// ETH_DMADescTypeDef * pxDMADescriptor; +// BaseType_t xIndex; + +// /* +// * RX-descriptors. +// */ + +// /* Get the pointer on the first member of the descriptor list */ +// pxDMADescriptor = DMARxDscrTab; + +// /* Fill each DMA descriptor with the right values */ +// for( xIndex = 0; xIndex < ETH_RXBUFNB; xIndex++, pxDMADescriptor++ ) +// { +// /* Set Buffer1 size and Second Address Chained bit */ +// pxDMADescriptor->ControlBufferSize = ETH_DMARXDESC_RCH | EMAC_DMA_BUFFER_SIZE; + +// #if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) +// { +// /* Set Buffer1 address pointer */ +// NetworkBufferDescriptor_t * pxBuffer; + +// pxBuffer = pxGetNetworkBufferWithDescriptor( EMAC_DMA_BUFFER_SIZE, 100ul ); + +// /* If the assert below fails, make sure that there are at least 'ETH_RXBUFNB' +// * Network Buffers available during start-up ( ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ) */ +// configASSERT( pxBuffer != NULL ); + +// if( pxBuffer != NULL ) +// { +// pxDMADescriptor->Buffer1Addr = ( uint32_t ) pxBuffer->pucEthernetBuffer; +// pxDMADescriptor->Status = ETH_DMARXDESC_OWN; +// } +// } +// #else /* if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) */ +// { +// /* Set Buffer1 address pointer */ +// pxDMADescriptor->Buffer1Addr = ( uint32_t ) ( Rx_Buff[ xIndex ] ); +// /* Set Own bit of the Rx descriptor Status */ +// pxDMADescriptor->Status = ETH_DMARXDESC_OWN; +// } +// #endif /* if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) */ + +// /* Initialize the next descriptor with the Next Descriptor Polling Enable */ +// if( xIndex < ETH_RXBUFNB - 1 ) +// { +// /* Set next descriptor address register with next descriptor base address */ +// pxDMADescriptor->Buffer2NextDescAddr = ( uint32_t ) ( pxDMADescriptor + 1 ); +// } +// else +// { +// /* For last descriptor, set next descriptor address register equal to the first descriptor base address */ +// pxDMADescriptor->Buffer2NextDescAddr = ( uint32_t ) DMARxDscrTab; +// } +// } + +// /* Set Receive Descriptor List Address Register */ +// xETH.Instance->DMARDLAR = ( uint32_t ) DMARxDscrTab; +//} +///*-----------------------------------------------------------*/ + +//#if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_MDNS != 0 ) +// static void prvMACAddressConfig( ETH_HandleTypeDef * heth, +// uint32_t ulIndex, +// uint8_t * Addr ) +// { +// uint32_t ulTempReg; + +// ( void ) heth; + +// /* Calculate the selected MAC address high register. */ +// ulTempReg = 0x80000000ul | ( ( uint32_t ) Addr[ 5 ] << 8 ) | ( uint32_t ) Addr[ 4 ]; + +// /* Load the selected MAC address high register. */ +// ( *( __IO uint32_t * ) ( ( uint32_t ) ( ETH_MAC_ADDR_HBASE + ulIndex ) ) ) = ulTempReg; + +// /* Calculate the selected MAC address low register. */ +// ulTempReg = ( ( uint32_t ) Addr[ 3 ] << 24 ) | ( ( uint32_t ) Addr[ 2 ] << 16 ) | ( ( uint32_t ) Addr[ 1 ] << 8 ) | Addr[ 0 ]; + +// /* Load the selected MAC address low register */ +// ( *( __IO uint32_t * ) ( ( uint32_t ) ( ETH_MAC_ADDR_LBASE + ulIndex ) ) ) = ulTempReg; +// } +//#endif /* if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_MDNS != 0 ) */ +///*-----------------------------------------------------------*/ + +//BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxDescriptor, +// BaseType_t bReleaseAfterSend ) +//{ +// BaseType_t xReturn = pdFAIL; +// uint32_t ulTransmitSize = 0; +// __IO ETH_DMADescTypeDef * pxDmaTxDesc; +///* Do not wait too long for a free TX DMA buffer. */ +// const TickType_t xBlockTimeTicks = pdMS_TO_TICKS( 50u ); + +// /* Open a do {} while ( 0 ) loop to be able to call break. */ +// do +// { +// #if ( ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM != 0 ) +// { +// ProtocolPacket_t * pxPacket; + +// /* If the peripheral must calculate the checksum, it wants +// * the protocol checksum to have a value of zero. */ +// pxPacket = ( ProtocolPacket_t * ) ( pxDescriptor->pucEthernetBuffer ); + +// if( pxPacket->xICMPPacket.xIPHeader.ucProtocol == ( uint8_t ) ipPROTOCOL_ICMP ) +// { +// pxPacket->xICMPPacket.xICMPHeader.usChecksum = ( uint16_t ) 0u; +// } +// } +// #endif /* ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM */ + +// if( xPhyObject.ulLinkStatusMask != 0 ) +// { +// if( xSemaphoreTake( xTXDescriptorSemaphore, xBlockTimeTicks ) != pdPASS ) +// { +// /* Time-out waiting for a free TX descriptor. */ +// break; +// } + +// /* This function does the actual transmission of the packet. The packet is +// * contained in 'pxDescriptor' that is passed to the function. */ +// pxDmaTxDesc = xETH.TxDesc; + +// /* Is this buffer available? */ +// configASSERT( ( pxDmaTxDesc->Status & ETH_DMATXDESC_OWN ) == 0 ); + +// { +// /* Is this buffer available? */ +// /* Get bytes in current buffer. */ +// ulTransmitSize = pxDescriptor->xDataLength; + +// if( ulTransmitSize > EMAC_DMA_BUFFER_SIZE ) +// { +// ulTransmitSize = EMAC_DMA_BUFFER_SIZE; +// } + +// #if ( ipconfigZERO_COPY_TX_DRIVER == 0 ) +// { +// /* Copy the bytes. */ +// memcpy( ( void * ) pxDmaTxDesc->Buffer1Addr, pxDescriptor->pucEthernetBuffer, ulTransmitSize ); +// } +// #else +// { +// configASSERT( bReleaseAfterSend != 0 ); + +// /* Move the buffer. */ +// pxDmaTxDesc->Buffer1Addr = ( uint32_t ) pxDescriptor->pucEthernetBuffer; +// /* The Network Buffer has been passed to DMA, no need to release it. */ +// bReleaseAfterSend = pdFALSE_UNSIGNED; +// } +// #endif /* ipconfigZERO_COPY_TX_DRIVER */ + +// /* Ask to set the IPv4 checksum. +// * Also need an Interrupt on Completion so that 'vClearTXBuffers()' will be called.. */ +// #if ( ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM != 0 ) +// { +// pxDmaTxDesc->Status |= ETH_DMATXDESC_CIC_TCPUDPICMP_FULL | ETH_DMATXDESC_IC; +// } +// #else +// { +// pxDmaTxDesc->Status &= ~( ( uint32_t ) ETH_DMATXDESC_CIC ); +// pxDmaTxDesc->Status |= ETH_DMATXDESC_IC; +// } +// #endif + + +// /* Prepare transmit descriptors to give to DMA. */ + +// /* Set LAST and FIRST segment */ +// pxDmaTxDesc->Status |= ETH_DMATXDESC_FS | ETH_DMATXDESC_LS; +// /* Set frame size */ +// pxDmaTxDesc->ControlBufferSize = ( ulTransmitSize & ETH_DMATXDESC_TBS1 ); + +// #if ( NETWORK_BUFFERS_CACHED != 0 ) +// { +// BaseType_t xlength = CACHE_LINE_SIZE * ( ( ulTransmitSize + NETWORK_BUFFER_HEADER_SIZE + CACHE_LINE_SIZE - 1 ) / CACHE_LINE_SIZE ); +// uint32_t * pulBuffer = ( uint32_t ) ( pxDescriptor->pucEthernetBuffer - NETWORK_BUFFER_HEADER_SIZE ); +// cache_clean_invalidate_by_addr( pulBuffer, xlength ); +// } +// #endif + +// /* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */ +// pxDmaTxDesc->Status |= ETH_DMATXDESC_OWN; + +// /* Point to next descriptor */ +// xETH.TxDesc = ( ETH_DMADescTypeDef * ) ( xETH.TxDesc->Buffer2NextDescAddr ); +// /* Ensure completion of memory access */ +// __DSB(); +// /* Resume DMA transmission*/ +// xETH.Instance->DMATPDR = 0; +// iptraceNETWORK_INTERFACE_TRANSMIT(); +// xReturn = pdPASS; +// } +// } +// else +// { +// /* The PHY has no Link Status, packet shall be dropped. */ +// } +// } while( 0 ); + +// /* The buffer has been sent so can be released. */ +// if( bReleaseAfterSend != pdFALSE ) +// { +// vReleaseNetworkBufferAndDescriptor( pxDescriptor ); +// } + +// return xReturn; +//} +///*-----------------------------------------------------------*/ + +//static BaseType_t xMayAcceptPacket( uint8_t * pucEthernetBuffer ) +//{ +// const ProtocolPacket_t * pxProtPacket = ( const ProtocolPacket_t * ) pucEthernetBuffer; + +// switch( pxProtPacket->xTCPPacket.xEthernetHeader.usFrameType ) +// { +// case ipARP_FRAME_TYPE: +// /* Check it later. */ +// return pdTRUE; + +// case ipIPv4_FRAME_TYPE: +// /* Check it here. */ +// break; + +// default: +// /* Refuse the packet. */ +// return pdFALSE; +// } + +// #if ( ipconfigETHERNET_DRIVER_FILTERS_PACKETS == 1 ) +// { +// const IPHeader_t * pxIPHeader = &( pxProtPacket->xTCPPacket.xIPHeader ); +// uint32_t ulDestinationIPAddress; + +// /* Ensure that the incoming packet is not fragmented (only outgoing packets +// * can be fragmented) as these are the only handled IP frames currently. */ +// if( ( pxIPHeader->usFragmentOffset & ipFRAGMENT_OFFSET_BIT_MASK ) != 0U ) +// { +// return pdFALSE; +// } + +// /* HT: Might want to make the following configurable because +// * most IP messages have a standard length of 20 bytes */ + +// /* 0x45 means: IPv4 with an IP header of 5 x 4 = 20 bytes +// * 0x47 means: IPv4 with an IP header of 7 x 4 = 28 bytes */ +// if( ( pxIPHeader->ucVersionHeaderLength < 0x45 ) || ( pxIPHeader->ucVersionHeaderLength > 0x4F ) ) +// { +// return pdFALSE; +// } + +// ulDestinationIPAddress = pxIPHeader->ulDestinationIPAddress; + +// /* Is the packet for this node? */ +// if( ( ulDestinationIPAddress != *ipLOCAL_IP_ADDRESS_POINTER ) && +// /* Is it a broadcast address x.x.x.255 ? */ +// ( ( FreeRTOS_ntohl( ulDestinationIPAddress ) & 0xff ) != 0xff ) && +// #if ( ipconfigUSE_LLMNR == 1 ) +// ( ulDestinationIPAddress != ipLLMNR_IP_ADDR ) && +// #endif +// ( *ipLOCAL_IP_ADDRESS_POINTER != 0 ) ) +// { +// FreeRTOS_printf( ( "Drop IP %lxip\n", FreeRTOS_ntohl( ulDestinationIPAddress ) ) ); +// return pdFALSE; +// } + +// if( pxIPHeader->ucProtocol == ipPROTOCOL_UDP ) +// { +// #if ( ipconfigUSE_LLMNR == 1 ) || ( ipconfigUSE_MDNS == 1 ) || ( ipconfigUSE_NBNS == 1 ) || ( ipconfigUSE_DNS == 1 ) +// uint16_t usSourcePort = FreeRTOS_ntohs( pxProtPacket->xUDPPacket.xUDPHeader.usSourcePort ); +// uint16_t usDestinationPort = FreeRTOS_ntohs( pxProtPacket->xUDPPacket.xUDPHeader.usDestinationPort ); +// #endif + +// if( ( xPortHasUDPSocket( pxProtPacket->xUDPPacket.xUDPHeader.usDestinationPort ) == pdFALSE ) +// #if ipconfigUSE_LLMNR == 1 +// && ( usDestinationPort != ipLLMNR_PORT ) && +// ( usSourcePort != ipLLMNR_PORT ) +// #endif +// #if ipconfigUSE_MDNS == 1 +// && ( usDestinationPort != ipMDNS_PORT ) && +// ( usSourcePort != ipMDNS_PORT ) +// #endif +// #if ipconfigUSE_NBNS == 1 +// && ( usDestinationPort != ipNBNS_PORT ) && +// ( usSourcePort != ipNBNS_PORT ) +// #endif +// #if ipconfigUSE_DNS == 1 +// && ( usSourcePort != ipDNS_PORT ) +// #endif +// ) +// { +// /* Drop this packet, not for this device. */ +// /* FreeRTOS_printf( ( "Drop: UDP port %d -> %d\n", usSourcePort, usDestinationPort ) ); */ +// return pdFALSE; +// } +// } +// } +// #endif /* ipconfigETHERNET_DRIVER_FILTERS_PACKETS */ +// return pdTRUE; +//} +///*-----------------------------------------------------------*/ + +//static void prvPassEthMessages( NetworkBufferDescriptor_t * pxDescriptor ) +//{ +// IPStackEvent_t xRxEvent; + +// xRxEvent.eEventType = eNetworkRxEvent; +// xRxEvent.pvData = ( void * ) pxDescriptor; + +// if( xSendEventStructToIPTask( &xRxEvent, ( TickType_t ) 1000 ) != pdPASS ) +// { +// /* The buffer could not be sent to the stack so must be released again. +// * This is a deferred handler task, not a real interrupt, so it is ok to +// * use the task level function here. */ +// #if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) +// { +// do +// { +// NetworkBufferDescriptor_t * pxNext = pxDescriptor->pxNextBuffer; +// vReleaseNetworkBufferAndDescriptor( pxDescriptor ); +// pxDescriptor = pxNext; +// } while( pxDescriptor != NULL ); +// } +// #else +// { +// vReleaseNetworkBufferAndDescriptor( pxDescriptor ); +// } +// #endif /* ipconfigUSE_LINKED_RX_MESSAGES */ +// iptraceETHERNET_RX_EVENT_LOST(); +// FreeRTOS_printf( ( "prvPassEthMessages: Can not queue return packet!\n" ) ); +// } +// else +// { +// iptraceNETWORK_INTERFACE_RECEIVE(); +// } +//} + +//static BaseType_t prvNetworkInterfaceInput( void ) +//{ +// #if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) +// NetworkBufferDescriptor_t * pxFirstDescriptor = NULL; +// NetworkBufferDescriptor_t * pxLastDescriptor = NULL; +// #endif +// BaseType_t xReceivedLength = 0; +// __IO ETH_DMADescTypeDef * pxDMARxDescriptor; +// const TickType_t xDescriptorWaitTime = pdMS_TO_TICKS( niDESCRIPTOR_WAIT_TIME_MS ); +// uint8_t * pucBuffer; + +// pxDMARxDescriptor = xETH.RxDesc; + +// while( ( pxDMARxDescriptor->Status & ETH_DMARXDESC_OWN ) == 0u ) +// { +// NetworkBufferDescriptor_t * pxCurDescriptor; +// NetworkBufferDescriptor_t * pxNewDescriptor = NULL; +// BaseType_t xAccepted = pdTRUE; + +// /* Get the Frame Length of the received packet: subtract 4 bytes of the CRC */ +// xReceivedLength = ( ( pxDMARxDescriptor->Status & ETH_DMARXDESC_FL ) >> ETH_DMARXDESC_FRAMELENGTHSHIFT ) - 4; + +// pucBuffer = ( uint8_t * ) pxDMARxDescriptor->Buffer1Addr; + +// /* Update the ETHERNET DMA global Rx descriptor with next Rx descriptor */ +// /* Chained Mode */ +// /* Selects the next DMA Rx descriptor list for next buffer to read */ +// xETH.RxDesc = ( ETH_DMADescTypeDef * ) pxDMARxDescriptor->Buffer2NextDescAddr; + +// /* In order to make the code easier and faster, only packets in a single buffer +// * will be accepted. This can be done by making the buffers large enough to +// * hold a complete Ethernet packet, minus ipBUFFER_PADDING. +// * Therefore, two sanity checks: */ +// configASSERT( xReceivedLength <= EMAC_DMA_BUFFER_SIZE ); + +// if( ( pxDMARxDescriptor->Status & ( ETH_DMARXDESC_CE | ETH_DMARXDESC_IPV4HCE | ETH_DMARXDESC_FT ) ) != ETH_DMARXDESC_FT ) +// { +// /* Not an Ethernet frame-type or a checksum error. */ +// xAccepted = pdFALSE; +// } +// else +// { +// /* See if this packet must be handled. */ +// xAccepted = xMayAcceptPacket( pucBuffer ); +// } + +// if( xAccepted != pdFALSE ) +// { +// /* The packet will be accepted, but check first if a new Network Buffer can +// * be obtained. If not, the packet will still be dropped. */ +// pxNewDescriptor = pxGetNetworkBufferWithDescriptor( EMAC_DMA_BUFFER_SIZE, xDescriptorWaitTime ); + +// if( pxNewDescriptor == NULL ) +// { +// /* A new descriptor can not be allocated now. This packet will be dropped. */ +// xAccepted = pdFALSE; +// } +// } + +// #if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) +// { +// /* Find out which Network Buffer was originally passed to the descriptor. */ +// pxCurDescriptor = pxPacketBuffer_to_NetworkBuffer( pucBuffer ); +// configASSERT( pxCurDescriptor != NULL ); +// } +// #else +// { +// /* In this mode, the two descriptors are the same. */ +// pxCurDescriptor = pxNewDescriptor; + +// if( pxNewDescriptor != NULL ) +// { +// /* The packet is accepted and a new Network Buffer was created, +// * copy data to the Network Buffer. */ +// memcpy( pxNewDescriptor->pucEthernetBuffer, pucBuffer, xReceivedLength ); +// } +// } +// #endif /* if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) */ + +// if( xAccepted != pdFALSE ) +// { +// pxCurDescriptor->xDataLength = xReceivedLength; +// #if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) +// { +// pxCurDescriptor->pxNextBuffer = NULL; + +// if( pxFirstDescriptor == NULL ) +// { +// /* Becomes the first message */ +// pxFirstDescriptor = pxCurDescriptor; +// } +// else if( pxLastDescriptor != NULL ) +// { +// /* Add to the tail */ +// pxLastDescriptor->pxNextBuffer = pxCurDescriptor; +// } + +// pxLastDescriptor = pxCurDescriptor; +// } +// #else /* if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) */ +// { +// prvPassEthMessages( pxCurDescriptor ); +// } +// #endif /* if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) */ +// } + +// /* Release descriptors to DMA */ +// #if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) +// { +// /* Set Buffer1 address pointer */ +// if( pxNewDescriptor != NULL ) +// { +// pxDMARxDescriptor->Buffer1Addr = ( uint32_t ) pxNewDescriptor->pucEthernetBuffer; +// } +// else +// { +// /* The packet was dropped and the same Network +// * Buffer will be used to receive a new packet. */ +// } +// } +// #endif /* ipconfigZERO_COPY_RX_DRIVER */ + +// /* Set Buffer1 size and Second Address Chained bit */ +// pxDMARxDescriptor->ControlBufferSize = ETH_DMARXDESC_RCH | EMAC_DMA_BUFFER_SIZE; +// pxDMARxDescriptor->Status = ETH_DMARXDESC_OWN; + +// /* Ensure completion of memory access */ +// __DSB(); + +// /* When Rx Buffer unavailable flag is set clear it and resume +// * reception. */ +// if( ( xETH.Instance->DMASR & ETH_DMASR_RBUS ) != 0 ) +// { +// /* Clear RBUS ETHERNET DMA flag. */ +// xETH.Instance->DMASR = ETH_DMASR_RBUS; + +// /* Resume DMA reception. */ +// xETH.Instance->DMARPDR = 0; +// } + +// pxDMARxDescriptor = xETH.RxDesc; +// } + +// #if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) +// { +// if( pxFirstDescriptor != NULL ) +// { +// prvPassEthMessages( pxFirstDescriptor ); +// } +// } +// #endif /* ipconfigUSE_LINKED_RX_MESSAGES */ + +// return( xReceivedLength > 0 ); +//} +///*-----------------------------------------------------------*/ + + +//BaseType_t xSTM32_PhyRead( BaseType_t xAddress, +// BaseType_t xRegister, +// uint32_t * pulValue ) +//{ +// uint16_t usPrevAddress = xETH.Init.PhyAddress; +// BaseType_t xResult; +// HAL_StatusTypeDef xHALResult; + +// xETH.Init.PhyAddress = xAddress; +// xHALResult = HAL_ETH_ReadPHYRegister( &xETH, ( uint16_t ) xRegister, pulValue ); +// xETH.Init.PhyAddress = usPrevAddress; + +// if( xHALResult == HAL_OK ) +// { +// xResult = 0; +// } +// else +// { +// xResult = -1; +// } + +// return xResult; +//} +///*-----------------------------------------------------------*/ + +//BaseType_t xSTM32_PhyWrite( BaseType_t xAddress, +// BaseType_t xRegister, +// uint32_t ulValue ) +//{ +// uint16_t usPrevAddress = xETH.Init.PhyAddress; +// BaseType_t xResult; +// HAL_StatusTypeDef xHALResult; + +// xETH.Init.PhyAddress = xAddress; +// xHALResult = HAL_ETH_WritePHYRegister( &xETH, ( uint16_t ) xRegister, ulValue ); +// xETH.Init.PhyAddress = usPrevAddress; + +// if( xHALResult == HAL_OK ) +// { +// xResult = 0; +// } +// else +// { +// xResult = -1; +// } + +// return xResult; +//} +///*-----------------------------------------------------------*/ + +//void vMACBProbePhy( void ) +//{ +// vPhyInitialise( &xPhyObject, xSTM32_PhyRead, xSTM32_PhyWrite ); +// xPhyDiscover( &xPhyObject ); +// xPhyConfigure( &xPhyObject, &xPHYProperties ); +//} +///*-----------------------------------------------------------*/ + +//static void prvEthernetUpdateConfig( BaseType_t xForce ) +//{ +// FreeRTOS_printf( ( "prvEthernetUpdateConfig: LS mask %02lX Force %d\n", +// xPhyObject.ulLinkStatusMask, +// ( int ) xForce ) ); + +// if( ( xForce != pdFALSE ) || ( xPhyObject.ulLinkStatusMask != 0 ) ) +// { +// /* Restart the auto-negotiation. */ +// if( xETH.Init.AutoNegotiation != ETH_AUTONEGOTIATION_DISABLE ) +// { +// xPhyStartAutoNegotiation( &xPhyObject, xPhyGetMask( &xPhyObject ) ); + +// /* Configure the MAC with the Duplex Mode fixed by the +// * auto-negotiation process. */ +// if( xPhyObject.xPhyProperties.ucDuplex == PHY_DUPLEX_FULL ) +// { +// xETH.Init.DuplexMode = ETH_MODE_FULLDUPLEX; +// } +// else +// { +// xETH.Init.DuplexMode = ETH_MODE_HALFDUPLEX; +// } + +// /* Configure the MAC with the speed fixed by the +// * auto-negotiation process. */ +// if( xPhyObject.xPhyProperties.ucSpeed == PHY_SPEED_10 ) +// { +// xETH.Init.Speed = ETH_SPEED_10M; +// } +// else +// { +// xETH.Init.Speed = ETH_SPEED_100M; +// } +// } +// else /* AutoNegotiation Disable */ +// { +// /* Check parameters */ +// assert_param( IS_ETH_SPEED( xETH.Init.Speed ) ); +// assert_param( IS_ETH_DUPLEX_MODE( xETH.Init.DuplexMode ) ); + +// if( xETH.Init.DuplexMode == ETH_MODE_FULLDUPLEX ) +// { +// xPhyObject.xPhyPreferences.ucDuplex = PHY_DUPLEX_HALF; +// } +// else +// { +// xPhyObject.xPhyPreferences.ucDuplex = PHY_DUPLEX_FULL; +// } + +// if( xETH.Init.Speed == ETH_SPEED_10M ) +// { +// xPhyObject.xPhyPreferences.ucSpeed = PHY_SPEED_10; +// } +// else +// { +// xPhyObject.xPhyPreferences.ucSpeed = PHY_SPEED_100; +// } + +// xPhyObject.xPhyPreferences.ucMDI_X = PHY_MDIX_AUTO; + +// /* Use predefined (fixed) configuration. */ +// xPhyFixedValue( &xPhyObject, xPhyGetMask( &xPhyObject ) ); +// } + +// /* ETHERNET MAC Re-Configuration */ +// HAL_ETH_ConfigMAC( &xETH, ( ETH_MACInitTypeDef * ) NULL ); + +// /* Restart MAC interface */ +// HAL_ETH_Start( &xETH ); +// } +// else +// { +// /* Stop MAC interface */ +// HAL_ETH_Stop( &xETH ); +// } +//} +///*-----------------------------------------------------------*/ + +//BaseType_t xGetPhyLinkStatus( void ) +//{ +// BaseType_t xReturn; + +// if( xPhyObject.ulLinkStatusMask != 0 ) +// { +// xReturn = pdPASS; +// } +// else +// { +// xReturn = pdFAIL; +// } + +// return xReturn; +//} +///*-----------------------------------------------------------*/ + +///* Uncomment this in case BufferAllocation_1.c is used. */ + +//void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] ) +//{ +// static +// #if defined( STM32F7xx ) +// __attribute__( ( section( ".first_data" ) ) ) +// #endif +// uint8_t ucNetworkPackets[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS * ETH_MAX_PACKET_SIZE ] __attribute__( ( aligned( 32 ) ) ); +// uint8_t * ucRAMBuffer = ucNetworkPackets; +// uint32_t ul; + +// for( ul = 0; ul < ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS; ul++ ) +// { +// pxNetworkBuffers[ ul ].pucEthernetBuffer = ucRAMBuffer + ipBUFFER_PADDING; +// *( ( unsigned * ) ucRAMBuffer ) = ( unsigned ) ( &( pxNetworkBuffers[ ul ] ) ); +// ucRAMBuffer += ETH_MAX_PACKET_SIZE; +// } +//} +///*-----------------------------------------------------------*/ + +//static void prvEMACHandlerTask( void * pvParameters ) +//{ +// UBaseType_t uxCurrentCount; +// BaseType_t xResult; +// const TickType_t ulMaxBlockTime = pdMS_TO_TICKS( 100UL ); +// uint32_t ulISREvents = 0U; + +// /* Remove compiler warnings about unused parameters. */ +// ( void ) pvParameters; + +// for( ; ; ) +// { +// xResult = 0; + +// #if ( ipconfigHAS_PRINTF != 0 ) +// { +// /* Call a function that monitors resources: the amount of free network +// * buffers and the amount of free space on the heap. See FreeRTOS_IP.c +// * for more detailed comments. */ +// vPrintResourceStats(); +// } +// #endif /* ( ipconfigHAS_PRINTF != 0 ) */ + +// if( xTXDescriptorSemaphore != NULL ) +// { +// static UBaseType_t uxLowestSemCount = ( UBaseType_t ) ETH_TXBUFNB - 1; + +// uxCurrentCount = uxSemaphoreGetCount( xTXDescriptorSemaphore ); + +// if( uxLowestSemCount > uxCurrentCount ) +// { +// uxLowestSemCount = uxCurrentCount; +// FreeRTOS_printf( ( "TX DMA buffers: lowest %lu\n", uxLowestSemCount ) ); +// } +// } + +// /* Wait for a new event or a time-out. */ +// xTaskNotifyWait( 0U, /* ulBitsToClearOnEntry */ +// EMAC_IF_ALL_EVENT, /* ulBitsToClearOnExit */ +// &( ulISREvents ), /* pulNotificationValue */ +// ulMaxBlockTime ); + +// if( ( ulISREvents & EMAC_IF_RX_EVENT ) != 0 ) +// { +// xResult = prvNetworkInterfaceInput(); +// } + +// if( ( ulISREvents & EMAC_IF_TX_EVENT ) != 0 ) +// { +// /* Code to release TX buffers in case zero-copy is used. */ +// /* Check if DMA packets have been delivered. */ +// vClearTXBuffers(); +// } + +// if( ( ulISREvents & EMAC_IF_ERR_EVENT ) != 0 ) +// { +// /* Future extension: logging about errors that occurred. */ +// } + +// if( xPhyCheckLinkStatus( &xPhyObject, xResult ) != 0 ) +// { +// /* Something has changed to a Link Status, need re-check. */ +// prvEthernetUpdateConfig( pdFALSE ); +// } +// } +//} +///*-----------------------------------------------------------*/ + +//void ETH_IRQHandler( void ) +//{ +// HAL_ETH_IRQHandler( &xETH ); +//} /* - * FreeRTOS+TCP V3.1.0 - * Copyright (C) 2022 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * SPDX-License-Identifier: MIT - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://aws.amazon.com/freertos - * http://www.FreeRTOS.org + * Some constants, hardware definitions and comments taken from ST's HAL driver + * library, COPYRIGHT(c) 2015 STMicroelectronics. */ -/***************************************************************************** -* Note: This file is Not! to be used as is. The purpose of this file is to provide -* a template for writing a network interface. Each network interface will have to provide -* concrete implementations of the functions in this file. -* -* See the following URL for an explanation of this file and its functions: -* https://freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/Embedded_Ethernet_Porting.html -* -*****************************************************************************/ +/* + * FreeRTOS+TCP Labs Build 160919 (C) 2016 Real Time Engineers ltd. + * Authors include Hein Tibosch and Richard Barry + * + ******************************************************************************* + ***** NOTE ******* NOTE ******* NOTE ******* NOTE ******* NOTE ******* NOTE *** + *** *** + *** *** + *** FREERTOS+TCP IS STILL IN THE LAB (mainly because the FTP and HTTP *** + *** demos have a dependency on FreeRTOS+FAT, which is only in the Labs *** + *** download): *** + *** *** + *** FreeRTOS+TCP is functional and has been used in commercial products *** + *** for some time. Be aware however that we are still refining its *** + *** design, the source code does not yet quite conform to the strict *** + *** coding and style standards mandated by Real Time Engineers ltd., and *** + *** the documentation and testing is not necessarily complete. *** + *** *** + *** PLEASE REPORT EXPERIENCES USING THE SUPPORT RESOURCES FOUND ON THE *** + *** URL: http://www.FreeRTOS.org/contact Active early adopters may, at *** + *** the sole discretion of Real Time Engineers Ltd., be offered versions *** + *** under a license other than that described below. *** + *** *** + *** *** + ***** NOTE ******* NOTE ******* NOTE ******* NOTE ******* NOTE ******* NOTE *** + ******************************************************************************* + * + * FreeRTOS+TCP can be used under two different free open source licenses. The + * license that applies is dependent on the processor on which FreeRTOS+TCP is + * executed, as follows: + * + * If FreeRTOS+TCP is executed on one of the processors listed under the Special + * License Arrangements heading of the FreeRTOS+TCP license information web + * page, then it can be used under the terms of the FreeRTOS Open Source + * License. If FreeRTOS+TCP is used on any other processor, then it can be used + * under the terms of the GNU General Public License V2. Links to the relevant + * licenses follow: + * + * The FreeRTOS+TCP License Information Page: http://www.FreeRTOS.org/tcp_license + * The FreeRTOS Open Source License: http://www.FreeRTOS.org/license + * The GNU General Public License Version 2: http://www.FreeRTOS.org/gpl-2.0.txt + * + * FreeRTOS+TCP is distributed in the hope that it will be useful. You cannot + * use FreeRTOS+TCP unless you agree that you use the software 'as is'. + * FreeRTOS+TCP is provided WITHOUT ANY WARRANTY; without even the implied + * warranties of NON-INFRINGEMENT, MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. Real Time Engineers Ltd. disclaims all conditions and terms, be they + * implied, expressed, or statutory. + * + * 1 tab == 4 spaces! + * + * http://www.FreeRTOS.org + * http://www.FreeRTOS.org/plus + * http://www.FreeRTOS.org/labs + * + */ /* Standard includes. */ #include #include #include +#include /* FreeRTOS includes. */ #include "FreeRTOS.h" @@ -50,1311 +1436,480 @@ #include "FreeRTOS_IP.h" #include "FreeRTOS_Sockets.h" #include "FreeRTOS_IP_Private.h" -#include "FreeRTOS_DNS.h" -#include "FreeRTOS_ARP.h" #include "NetworkBufferManagement.h" #include "NetworkInterface.h" -#include "phyHandling.h" -//#include "stm32fxx_hal_eth.h" - -/*#include "Driver_ETH.h" +//#include "Driver_ETH.h" #include "Driver_ETH_MAC.h" -#include "Driver_ETH_PHY.h"*/ -/* If ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES is set to 1, then the Ethernet - * driver will filter incoming packets and only pass the stack those packets it - * considers need processing. */ -#if ( ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES == 0 ) - #define ipCONSIDER_FRAME_FOR_PROCESSING( pucEthernetBuffer ) eProcessBuffer -#else - #define ipCONSIDER_FRAME_FOR_PROCESSING( pucEthernetBuffer ) eConsiderFrameForProcessing( ( pucEthernetBuffer ) ) -#endif +#include "Driver_ETH_PHY.h" +#include "gd32f10x_enet.h" +static void receiveHandlerTask( void *pvParameters ); +static TaskHandle_t receiveHandler = NULL; -BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxNetworkBuffer, - BaseType_t xReleaseAfterSend ) +static ARM_ETH_MAC_ADDR own_mac_address ;//device mac adress stores here. MSB first +static ARM_DRIVER_ETH_MAC *mac; +static ARM_ETH_MAC_CAPABILITIES capabilities; +//#define Driver_ETH_MAC0 ARM_Driver_ETH_MAC_(0) +//extern ARM_DRIVER_ETH_MAC Driver_ETH_MAC0; + +/** + \fn ARM_DRIVER_VERSION ARM_ETH_MAC_GetVersion (void) + \brief Get driver version. + \return \ref ARM_DRIVER_VERSION +*/ +ARM_DRIVER_VERSION ARM_ETH_MAC_GetVersion (void) { - /* FIX ME. */ - return pdFALSE; + ARM_DRIVER_VERSION eth_mac_driver_version = {1,1}; + return eth_mac_driver_version; } -void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] ) +/** + \fn ARM_ETH_MAC_CAPABILITIES ARM_ETH_MAC_GetCapabilities (void) + \brief Get driver capabilities. + \return \ref ARM_ETH_MAC_CAPABILITIES +*/ +ARM_ETH_MAC_CAPABILITIES ARM_ETH_MAC_GetCapabilities (void) { - /* FIX ME. */ + ARM_ETH_MAC_CAPABILITIES eth_mac_capabilities = { + 1, ///< 1 = IPv4 header checksum verified on receive + 1, ///< 1 = IPv6 checksum verification supported on receive + 1, ///< 1 = UDP payload checksum verified on receive + 1, ///< 1 = TCP payload checksum verified on receive + 1, ///< 1 = ICMP payload checksum verified on receive + 1, ///< 1 = IPv4 header checksum generated on transmit + 1, ///< 1 = IPv6 checksum generation supported on transmit + 1, ///< 1 = UDP payload checksum generated on transmit + 1, ///< 1 = TCP payload checksum generated on transmit + 1, ///< 1 = ICMP payload checksum generated on transmit + 1, ///< 0, 1, 2, 3, Ethernet Media Interface type + 1, ///< 1 = driver provides initial valid MAC address + 1, ///< 1 = callback event \ref ARM_ETH_MAC_EVENT_RX_FRAME generated + 1, ///< 1 = callback event \ref ARM_ETH_MAC_EVENT_TX_FRAME generated + 1, ///< 1 = wakeup event \ref ARM_ETH_MAC_EVENT_WAKEUP generated + 1, ///< 1 = Precision Timer supported + 0 ///< Reserved (must be zero) + }; + return eth_mac_capabilities; } -BaseType_t xGetPhyLinkStatus( void ) +/** + \fn int32_t ARM_ETH_MAC_Initialize (ARM_ETH_MAC_SignalEvent_t cb_event) + \brief Initialize Ethernet MAC Device. + \param[in] cb_event Pointer to \ref ARM_ETH_MAC_SignalEvent + \return \ref execution_status +*/ +int32_t ARM_ETH_MAC_Initialize (ARM_ETH_MAC_SignalEvent_t cb_event) { - /* FIX ME. */ - return pdFALSE; + enet_init(ENET_AUTO_NEGOTIATION, ENET_AUTOCHECKSUM_DROP_FAILFRAMES, ENET_RECEIVEALL); + return pdTRUE; } - - - -/* ST includes. */ -#if defined( GD32F10X_CL ) - #include "gd32f10x_enet.h" -#elif defined( STM32F7xx ) - #include "stm32f7xx_hal.h" - #define CACHE_LINE_SIZE 32u -#elif defined( STM32F4xx ) - #include "stm32f4xx_hal.h" -#elif defined( STM32F2xx ) - #include "stm32f2xx_hal.h" -#elif defined( STM32F1xx ) - #include "stm32f1xx_hal.h" -#elif !defined( _lint ) /* Lint does not like an #error */ - #error What part? -#endif /* if defined( GD32F10X_CL ) */ - - -/* Interrupt events to process. Currently only the Rx event is processed - * although code for other events is included to allow for possible future - * expansion. */ -#define EMAC_IF_RX_EVENT 1UL -#define EMAC_IF_TX_EVENT 2UL -#define EMAC_IF_ERR_EVENT 4UL -#define EMAC_IF_ALL_EVENT ( EMAC_IF_RX_EVENT | EMAC_IF_TX_EVENT | EMAC_IF_ERR_EVENT ) - -/* Calculate the maximum packet size that the DMA can receive. */ -#define EMAC_DMA_BUFFER_SIZE ( ( uint32_t ) ( ETH_MAX_PACKET_SIZE - ipBUFFER_PADDING ) ) - -#define ETH_DMA_ALL_INTS \ - ( ETH_DMA_IT_TST | ETH_DMA_IT_PMT | ETH_DMA_IT_MMC | ETH_DMA_IT_NIS | \ - ETH_DMA_IT_AIS | ETH_DMA_IT_ER | ETH_DMA_IT_FBE | ETH_DMA_IT_RWT | \ - ETH_DMA_IT_RPS | ETH_DMA_IT_RBU | ETH_DMA_IT_R | ETH_DMA_IT_TU | \ - ETH_DMA_IT_RO | ETH_DMA_IT_TJT | ETH_DMA_IT_TPS | ETH_DMA_IT_T ) - -#ifndef NETWORK_BUFFER_HEADER_SIZE - #define NETWORK_BUFFER_HEADER_SIZE ( ipBUFFER_PADDING ) -#endif - -#ifndef niEMAC_HANDLER_TASK_PRIORITY - #define niEMAC_HANDLER_TASK_PRIORITY configMAX_PRIORITIES - 1 -#endif - -#if ( ( ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM == 0 ) || ( ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM == 0 ) ) - #warning Consider enabling checksum offloading -#endif - -#ifndef niDESCRIPTOR_WAIT_TIME_MS - #define niDESCRIPTOR_WAIT_TIME_MS 250uL -#endif - -/* - * Most users will want a PHY that negotiates about - * the connection properties: speed, dmix and duplex. - * On some rare cases, you want to select what is being - * advertised, properties like MDIX and duplex. - */ - -#if !defined( ipconfigETHERNET_AN_ENABLE ) - /* Enable auto-negotiation */ - #define ipconfigETHERNET_AN_ENABLE 1 -#endif - -#if !defined( ipconfigETHERNET_AUTO_CROSS_ENABLE ) - #define ipconfigETHERNET_AUTO_CROSS_ENABLE 1 -#endif - -#if ( ipconfigETHERNET_AN_ENABLE == 0 ) - -/* - * The following three defines are only used in case there - * is no auto-negotiation. - */ - #if !defined( ipconfigETHERNET_CROSSED_LINK ) - #define ipconfigETHERNET_CROSSED_LINK 1 - #endif - - #if !defined( ipconfigETHERNET_USE_100MB ) - #define ipconfigETHERNET_USE_100MB 1 - #endif - - #if !defined( ipconfigETHERNET_USE_FULL_DUPLEX ) - #define ipconfigETHERNET_USE_FULL_DUPLEX 1 - #endif -#endif /* ipconfigETHERNET_AN_ENABLE == 0 */ - -/* Default the size of the stack used by the EMAC deferred handler task to twice - * the size of the stack used by the idle task - but allow this to be overridden in - * FreeRTOSConfig.h as configMINIMAL_STACK_SIZE is a user definable constant. */ -#ifndef configEMAC_TASK_STACK_SIZE - #define configEMAC_TASK_STACK_SIZE ( 2 * configMINIMAL_STACK_SIZE ) -#endif - -/* Two choices must be made: RMII versus MII, - * and the index of the PHY in use ( between 0 and 31 ). */ -#ifndef ipconfigUSE_RMII - #ifdef GD32F10X_CL - #define ipconfigUSE_RMII 1 - #warning Using RMII, make sure if this is correct - #else - #define ipconfigUSE_RMII 0 - #warning Using MII, make sure if this is correct - #endif /* GD32F10X_CL */ -#endif /* ipconfigUSE_RMII */ - -typedef enum +/** + \fn int32_t ARM_ETH_MAC_Uninitialize (void) + \brief De-initialize Ethernet MAC Device. + \return \ref execution_status +*/ +int32_t ARM_ETH_MAC_Uninitialize (void) { - eMACInit, /* Must initialise MAC. */ - eMACPass, /* Initialisation was successful. */ - eMACFailed, /* Initialisation failed. */ -} eMAC_INIT_STATUS_TYPE; - -static eMAC_INIT_STATUS_TYPE xMacInitStatus = eMACInit; - -/*-----------------------------------------------------------*/ - -/* - * A deferred interrupt handler task that processes - */ -static void prvEMACHandlerTask( void * pvParameters ); - -/* - * Force a negotiation with the Switch or Router and wait for LS. - */ -static void prvEthernetUpdateConfig( BaseType_t xForce ); - -/* - * See if there is a new packet and forward it to the IP-task. - */ -static BaseType_t prvNetworkInterfaceInput( void ); - -#if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_MDNS != 0 ) - -/* - * For LLMNR, an extra MAC-address must be configured to - * be able to receive the multicast messages. - */ - static void prvMACAddressConfig( ETH_HandleTypeDef * heth, - uint32_t ulIndex, - uint8_t * Addr ); -#endif - -/* - * Check if a given packet should be accepted. - */ -static BaseType_t xMayAcceptPacket( uint8_t * pucEthernetBuffer ); - -/* - * Initialise the TX descriptors. - */ -static void prvDMATxDescListInit( void ); - -/* - * Initialise the RX descriptors. - */ -static void prvDMARxDescListInit( void ); - -/* After packets have been sent, the network - * buffers will be released. */ -static void vClearTXBuffers( void ); - -/*-----------------------------------------------------------*/ - -#if ( ipconfigUSE_LLMNR == 1 ) - static const uint8_t xLLMNR_MACAddress[] = { 0x01, 0x00, 0x5E, 0x00, 0x00, 0xFC }; -#endif - -static EthernetPhy_t xPhyObject; - -/* Ethernet handle. */ -static ETH_HandleTypeDef xETH; - -/* xTXDescriptorSemaphore is a counting semaphore with - * a maximum count of ETH_TXBUFNB, which is the number of - * DMA TX descriptors. */ -static SemaphoreHandle_t xTXDescriptorSemaphore = NULL; - -/* - * Note: it is advised to define both - * - * #define ipconfigZERO_COPY_RX_DRIVER 1 - * #define ipconfigZERO_COPY_TX_DRIVER 1 - * - * The method using memcpy is slower and probably uses more RAM memory. - * The possibility is left in the code just for comparison. - * - * It is advised to define ETH_TXBUFNB at least 4. Note that no - * TX buffers are allocated in a zero-copy driver. - */ -/* MAC buffers: ---------------------------------------------------------*/ - -/* Put the DMA descriptors in '.first_data'. - * This is important for STM32F7, which has an L1 data cache. - * The first 64KB of the SRAM is not cached. - * See README.TXT in this folder. */ - -/* Ethernet Rx MA Descriptor */ -__attribute__( ( aligned( 32 ) ) ) -#if defined( STM32F7xx ) - __attribute__( ( section( ".first_data" ) ) ) -#endif -ETH_DMADescTypeDef DMARxDscrTab[ ETH_RXBUFNB ]; - -#if ( ipconfigZERO_COPY_RX_DRIVER == 0 ) - /* Ethernet Receive Buffer */ - __ALIGN_BEGIN uint8_t Rx_Buff[ ETH_RXBUFNB ][ ETH_RX_BUF_SIZE ] __ALIGN_END; -#endif - -/* Ethernet Tx DMA Descriptor */ -__attribute__( ( aligned( 32 ) ) ) -#if defined( STM32F7xx ) - __attribute__( ( section( ".first_data" ) ) ) -#endif -ETH_DMADescTypeDef DMATxDscrTab[ ETH_TXBUFNB ]; - -#if ( ipconfigZERO_COPY_TX_DRIVER == 0 ) - /* Ethernet Transmit Buffer */ - __ALIGN_BEGIN uint8_t Tx_Buff[ ETH_TXBUFNB ][ ETH_TX_BUF_SIZE ] __ALIGN_END; -#endif - -/* DMATxDescToClear points to the next TX DMA descriptor - * that must be cleared by vClearTXBuffers(). */ -static __IO ETH_DMADescTypeDef * DMATxDescToClear; - -/* Holds the handle of the task used as a deferred interrupt processor. The - * handle is used so direct notifications can be sent to the task for all EMAC/DMA - * related interrupts. */ -static TaskHandle_t xEMACTaskHandle = NULL; - -/* For local use only: describe the PHY's properties: */ -const PhyProperties_t xPHYProperties = -{ - #if ( ipconfigETHERNET_AN_ENABLE != 0 ) - .ucSpeed = PHY_SPEED_AUTO, - .ucDuplex = PHY_DUPLEX_AUTO, - #else - #if ( ipconfigETHERNET_USE_100MB != 0 ) - .ucSpeed = PHY_SPEED_100, - #else - .ucSpeed = PHY_SPEED_10, - #endif - - #if ( ipconfigETHERNET_USE_FULL_DUPLEX != 0 ) - .ucDuplex = PHY_DUPLEX_FULL, - #else - .ucDuplex = PHY_DUPLEX_HALF, - #endif - #endif /* if ( ipconfigETHERNET_AN_ENABLE != 0 ) */ - - #if ( ipconfigETHERNET_AN_ENABLE != 0 ) && ( ipconfigETHERNET_AUTO_CROSS_ENABLE != 0 ) - .ucMDI_X = PHY_MDIX_AUTO, - #elif ( ipconfigETHERNET_CROSSED_LINK != 0 ) - .ucMDI_X = PHY_MDIX_CROSSED, - #else - .ucMDI_X = PHY_MDIX_DIRECT, - #endif -}; - -/*-----------------------------------------------------------*/ - -void HAL_ETH_RxCpltCallback( ETH_HandleTypeDef * heth ) -{ - BaseType_t xHigherPriorityTaskWoken = pdFALSE; - - ( void ) heth; - - /* Pass an RX-event and wakeup the prvEMACHandlerTask. */ - if( xEMACTaskHandle != NULL ) - { - xTaskNotifyFromISR( xEMACTaskHandle, EMAC_IF_RX_EVENT, eSetBits, &( xHigherPriorityTaskWoken ) ); - portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); - } + enet_deinit(); + return pdTRUE; } -/*-----------------------------------------------------------*/ -void HAL_ETH_TxCpltCallback( ETH_HandleTypeDef * heth ) -{ - BaseType_t xHigherPriorityTaskWoken = pdFALSE; - - ( void ) heth; - - /* Pass a TX-event and wakeup the prvEMACHandlerTask. */ - if( xEMACTaskHandle != NULL ) - { - xTaskNotifyFromISR( xEMACTaskHandle, EMAC_IF_TX_EVENT, eSetBits, &( xHigherPriorityTaskWoken ) ); - portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); - } +/** + \fn int32_t ARM_ETH_MAC_PowerControl (ARM_POWER_STATE state) + \brief Control Ethernet MAC Device Power. + \param[in] state Power state + \return \ref execution_status +*/ +int32_t ARM_ETH_MAC_PowerControl (ARM_POWER_STATE state) +{ + return pdTRUE; } -/*-----------------------------------------------------------*/ - -static void vClearTXBuffers() +/** + \fn int32_t ARM_ETH_MAC_GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr) + \brief Get Ethernet MAC Address. + \param[in] ptr_addr Pointer to address + \return \ref execution_status +*/ +int32_t ARM_ETH_MAC_GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr) { - __IO ETH_DMADescTypeDef * txLastDescriptor = xETH.TxDesc; - size_t uxCount = ( ( UBaseType_t ) ETH_TXBUFNB ) - uxSemaphoreGetCount( xTXDescriptorSemaphore ); - - #if ( ipconfigZERO_COPY_TX_DRIVER != 0 ) - NetworkBufferDescriptor_t * pxNetworkBuffer; - uint8_t * ucPayLoad; - #endif - - /* This function is called after a TX-completion interrupt. - * It will release each Network Buffer used in xNetworkInterfaceOutput(). - * 'uxCount' represents the number of descriptors given to DMA for transmission. - * After sending a packet, the DMA will clear the 'ETH_DMATXDESC_OWN' bit. */ - while( ( uxCount > 0 ) && ( ( DMATxDescToClear->Status & ETH_DMATXDESC_OWN ) == 0 ) ) - { - if( ( DMATxDescToClear == txLastDescriptor ) && ( uxCount != ETH_TXBUFNB ) ) - { - break; - } - - #if ( ipconfigZERO_COPY_TX_DRIVER != 0 ) - { - ucPayLoad = ( uint8_t * ) DMATxDescToClear->Buffer1Addr; - - if( ucPayLoad != NULL ) - { - pxNetworkBuffer = pxPacketBuffer_to_NetworkBuffer( ucPayLoad ); - - if( pxNetworkBuffer != NULL ) - { - vReleaseNetworkBufferAndDescriptor( pxNetworkBuffer ); - } - - DMATxDescToClear->Buffer1Addr = ( uint32_t ) 0u; - } - } - #endif /* ipconfigZERO_COPY_TX_DRIVER */ - - DMATxDescToClear = ( ETH_DMADescTypeDef * ) ( DMATxDescToClear->Buffer2NextDescAddr ); - - uxCount--; - /* Tell the counting semaphore that one more TX descriptor is available. */ - xSemaphoreGive( xTXDescriptorSemaphore ); - } + enet_mac_address_get(ENET_MAC_ADDRESS0, (uint8_t*)&ptr_addr->b[0]); + enet_mac_address_get(ENET_MAC_ADDRESS1, (uint8_t*)&ptr_addr->b[1]); + enet_mac_address_get(ENET_MAC_ADDRESS2, (uint8_t*)&ptr_addr->b[2]); + enet_mac_address_get(ENET_MAC_ADDRESS3, (uint8_t*)&ptr_addr->b[3]); + + return pdTRUE; } -/*-----------------------------------------------------------*/ +/** + \fn int32_t ARM_ETH_MAC_SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr) + \brief Set Ethernet MAC Address. + \param[in] ptr_addr Pointer to address + \return \ref execution_status +*/ +int32_t ARM_ETH_MAC_SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr) +{ + enet_mac_address_set(ENET_MAC_ADDRESS0, (uint8_t*)&ptr_addr->b[0]); + enet_mac_address_set(ENET_MAC_ADDRESS1, (uint8_t*)&ptr_addr->b[1]); + enet_mac_address_set(ENET_MAC_ADDRESS2, (uint8_t*)&ptr_addr->b[2]); + enet_mac_address_set(ENET_MAC_ADDRESS3, (uint8_t*)&ptr_addr->b[3]); + + return pdTRUE; +} + +/** + \fn int32_t ARM_ETH_MAC_SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, + uint32_t num_addr) + \brief Configure Address Filter. + \param[in] ptr_addr Pointer to addresses + \param[in] num_addr Number of addresses to configure + \return \ref execution_status +*/ +int32_t ARM_ETH_MAC_SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr) +{ + //enet_address_filter_config(ENET_ADDRESS_FILTER_DA + return pdTRUE; +} +/** + \fn int32_t ARM_ETH_MAC_SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags) + \brief Send Ethernet frame. + \param[in] frame Pointer to frame buffer with data to send + \param[in] len Frame buffer length in bytes + \param[in] flags Frame transmit flags (see ARM_ETH_MAC_TX_FRAME_...) + \return \ref execution_status +*/ +/** + \fn int32_t ARM_ETH_MAC_ReadFrame (uint8_t *frame, uint32_t len) + \brief Read data of received Ethernet frame. + \param[in] frame Pointer to frame buffer for data to read into + \param[in] len Frame buffer length in bytes + \return number of data bytes read or execution status + - value >= 0: number of data bytes read + - value < 0: error occurred, value is execution status as defined with \ref execution_status +*/ +/** + \fn uint32_t ARM_ETH_MAC_GetRxFrameSize (void) + \brief Get size of received Ethernet frame. + \return number of bytes in received frame +*/ +/** + \fn int32_t ARM_ETH_MAC_GetRxFrameTime (ARM_ETH_MAC_TIME *time) + \brief Get time of received Ethernet frame. + \param[in] time Pointer to time structure for data to read into + \return \ref execution_status +*/ +/** + \fn int32_t ARM_ETH_MAC_GetTxFrameTime (ARM_ETH_MAC_TIME *time) + \brief Get time of transmitted Ethernet frame. + \param[in] time Pointer to time structure for data to read into + \return \ref execution_status +*/ +/** + \fn int32_t ARM_ETH_MAC_Control (uint32_t control, uint32_t arg) + \brief Control Ethernet Interface. + \param[in] control Operation + \param[in] arg Argument of operation (optional) + \return \ref execution_status +*/ +/** + \fn int32_t ARM_ETH_MAC_ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time) + \brief Control Precision Timer. + \param[in] control Operation + \param[in] time Pointer to time structure + \return \ref execution_status +*/ +/** + \fn int32_t ARM_ETH_MAC_PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data) + \brief Read Ethernet PHY Register through Management Interface. + \param[in] phy_addr 5-bit device address + \param[in] reg_addr 5-bit register address + \param[out] data Pointer where the result is written to + \return \ref execution_status +*/ +/** + \fn int32_t ARM_ETH_MAC_PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data) + \brief Write Ethernet PHY Register through Management Interface. + \param[in] phy_addr 5-bit device address + \param[in] reg_addr 5-bit register address + \param[in] data 16-bit data to write + \return \ref execution_status +*/ + +/** + \fn void ARM_ETH_MAC_SignalEvent (uint32_t event) + \brief Callback function that signals a Ethernet Event. + \param[in] event event notification mask + \return none +*/ +ARM_DRIVER_ETH_MAC Driver_ETH_MAC0 = {ARM_ETH_MAC_GetVersion, + ARM_ETH_MAC_GetCapabilities, + ARM_ETH_MAC_Initialize, + ARM_ETH_MAC_Uninitialize, + ARM_ETH_MAC_PowerControl, + ARM_ETH_MAC_GetMacAddress, + ARM_ETH_MAC_SetMacAddress, + ARM_ETH_MAC_SetAddressFilter, + ARM_ETH_MAC_SendFrame, + ARM_ETH_MAC_ReadFrame, + ARM_ETH_MAC_GetRxFrameSize, + ARM_ETH_MAC_GetRxFrameTime, + ARM_ETH_MAC_GetTxFrameTime, + ARM_ETH_MAC_ControlTimer, + ARM_ETH_MAC_Control, + ARM_ETH_MAC_PHY_Read, + ARM_ETH_MAC_PHY_Write}; + + + + +extern ARM_DRIVER_ETH_PHY ARM_Driver_ETH_PHY_(0); +#define Driver_ETH_PHY0 ARM_Driver_ETH_PHY_(0) + +/*callback function for ARM_ETH_MAC_SignalEvent_t*/ +void ethernet_mac_notify (uint32_t event) { + switch (event) { + case ARM_ETH_MAC_EVENT_RX_FRAME: + /*received frame,call receive fuction*/ + //led1_toggle(); + xTaskNotifyGive( receiveHandler ); + break; + + case ARM_ETH_MAC_EVENT_TX_FRAME: + /* deliver finished */ + break; + + case ARM_ETH_MAC_EVENT_WAKEUP: + break; + + case ARM_ETH_MAC_EVENT_TIMER_ALARM: + /* do nothing */ + break; + } +} + +/* init the mac */ +int32_t macIntialise(void) +{ + own_mac_address.b[0] = configMAC_ADDR0; + own_mac_address.b[1] = configMAC_ADDR1; + own_mac_address.b[2] = configMAC_ADDR2; + own_mac_address.b[3] = configMAC_ADDR3; + own_mac_address.b[4] = configMAC_ADDR4; + own_mac_address.b[5] = configMAC_ADDR5; + + + + mac = &Driver_ETH_MAC0; + capabilities = mac->GetCapabilities (); + + + + if(mac->Initialize (ethernet_mac_notify) == ARM_DRIVER_OK && mac->PowerControl (ARM_POWER_FULL) == ARM_DRIVER_OK){ + + if (capabilities.mac_address == 0) { + // populate own_mac_address with the address to use.-----the fact situation + mac->SetMacAddress(&own_mac_address); + } + else { + mac->GetMacAddress(&own_mac_address); + } + + return ARM_DRIVER_OK; + } + else{ + return ARM_DRIVER_ERROR; + } +} + +/* init the phy */ + int32_t phyIntialise(void){ + int32_t state = ARM_DRIVER_OK; + + /* link the mac and phy through MAC0.PHY_Read() and MAC0.PHY_write */ + if(Driver_ETH_PHY0.Initialize(Driver_ETH_MAC0.PHY_Read,Driver_ETH_MAC0.PHY_Write)!= ARM_DRIVER_OK){ + state = ARM_DRIVER_ERROR; + return state; + } + + /* power on */ + if(Driver_ETH_PHY0.PowerControl(ARM_POWER_FULL)!=ARM_DRIVER_OK){ + state = ARM_DRIVER_ERROR; + return state; + } + + /* set RMII interface */ + if(Driver_ETH_PHY0.SetInterface (capabilities.media_interface)!=ARM_DRIVER_OK){ + state = ARM_DRIVER_ERROR; + return state; + } + + /* set mode */ + if(Driver_ETH_PHY0.SetMode (ARM_ETH_PHY_AUTO_NEGOTIATE)!=ARM_DRIVER_OK){ + state = ARM_DRIVER_ERROR; + return state; + } + + return state; +} + +/*init the mac and phy*/ BaseType_t xNetworkInterfaceInitialise( void ) { - HAL_StatusTypeDef hal_eth_init_status; - BaseType_t xResult; - - #if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_MDNS != 0 ) - BaseType_t xMACEntry = ETH_MAC_ADDRESS1; /* ETH_MAC_ADDRESS0 reserved for the primary MAC-address. */ - #endif - - if( xMacInitStatus == eMACInit ) - { - xTXDescriptorSemaphore = xSemaphoreCreateCounting( ( UBaseType_t ) ETH_TXBUFNB, ( UBaseType_t ) ETH_TXBUFNB ); - - if( xTXDescriptorSemaphore == NULL ) - { - xMacInitStatus = eMACFailed; - } - else - { - /* Initialise ETH */ - - xETH.Instance = ETH; - xETH.Init.AutoNegotiation = ETH_AUTONEGOTIATION_ENABLE; - xETH.Init.Speed = ETH_SPEED_100M; - xETH.Init.DuplexMode = ETH_MODE_FULLDUPLEX; - /* Value of PhyAddress doesn't matter, will be probed for. */ - xETH.Init.PhyAddress = 0; - - xETH.Init.MACAddr = ( uint8_t * ) FreeRTOS_GetMACAddress(); - xETH.Init.RxMode = ETH_RXINTERRUPT_MODE; - - #if ( ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM != 0 ) - { - /* using the ETH_CHECKSUM_BY_HARDWARE option: - * both the IP and the protocol checksums will be calculated - * by the peripheral. */ - xETH.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE; - } - #else - { - xETH.Init.ChecksumMode = ETH_CHECKSUM_BY_SOFTWARE; - } - #endif - - #if ( ipconfigUSE_RMII != 0 ) - { - xETH.Init.MediaInterface = ETH_MEDIA_INTERFACE_RMII; - } - #else - { - xETH.Init.MediaInterface = ETH_MEDIA_INTERFACE_MII; - } - #endif /* ipconfigUSE_RMII */ - - hal_eth_init_status = HAL_ETH_Init( &xETH ); - - /* Only for inspection by debugger. */ - ( void ) hal_eth_init_status; - - /* Set the TxDesc and RxDesc pointers. */ - xETH.TxDesc = DMATxDscrTab; - xETH.RxDesc = DMARxDscrTab; - - /* Make sure that all unused fields are cleared. */ - memset( &DMATxDscrTab, '\0', sizeof( DMATxDscrTab ) ); - memset( &DMARxDscrTab, '\0', sizeof( DMARxDscrTab ) ); - - /* Initialize Tx Descriptors list: Chain Mode */ - DMATxDescToClear = DMATxDscrTab; - - /* Initialise TX-descriptors. */ - prvDMATxDescListInit(); - - /* Initialise RX-descriptors. */ - prvDMARxDescListInit(); - - #if ( ipconfigUSE_MDNS == 1 ) - { - /* Program the MDNS address. */ - prvMACAddressConfig( &xETH, xMACEntry, ( uint8_t * ) xMDNS_MACAddressIPv4 ); - xMACEntry += 8; - } - #endif - #if ( ipconfigUSE_LLMNR == 1 ) - { - /* Program the LLMNR address. */ - prvMACAddressConfig( &xETH, xMACEntry, ( uint8_t * ) xLLMNR_MACAddress ); - xMACEntry += 8; - } - #endif - - /* Force a negotiation with the Switch or Router and wait for LS. */ - prvEthernetUpdateConfig( pdTRUE ); - - /* The deferred interrupt handler task is created at the highest - * possible priority to ensure the interrupt handler can return directly - * to it. The task's handle is stored in xEMACTaskHandle so interrupts can - * notify the task when there is something to process. */ - if( xTaskCreate( prvEMACHandlerTask, "EMAC", configEMAC_TASK_STACK_SIZE, NULL, niEMAC_HANDLER_TASK_PRIORITY, &xEMACTaskHandle ) == pdPASS ) - { - /* The xTXDescriptorSemaphore and the task are created successfully. */ - xMacInitStatus = eMACPass; - } - else - { - xMacInitStatus = eMACFailed; - } - } - } /* if( xMacInitStatus == eMACInit ) */ - - if( xMacInitStatus != eMACPass ) - { - /* EMAC initialisation failed, return pdFAIL. */ - xResult = pdFAIL; - } - else - { - if( xPhyObject.ulLinkStatusMask != 0U ) - { - xETH.Instance->DMAIER |= ETH_DMA_ALL_INTS; - xResult = pdPASS; - FreeRTOS_printf( ( "Link Status is high\n" ) ); - } - else - { - /* For now pdFAIL will be returned. But prvEMACHandlerTask() is running - * and it will keep on checking the PHY and set 'ulLinkStatusMask' when necessary. */ - xResult = pdFAIL; - } - } - - /* When returning non-zero, the stack will become active and - * start DHCP (in configured) */ - return xResult; + static ARM_ETH_LINK_INFO info; + BaseType_t state = pdFALSE; + if(state == pdFALSE){ + state = xTaskCreate( receiveHandlerTask, "receiveHandlerTask", 1000, NULL, 1, &receiveHandler ); + } + + if(macIntialise() == ARM_DRIVER_OK && phyIntialise() ==ARM_DRIVER_OK){ + ARM_ETH_LINK_STATE link = Driver_ETH_PHY0.GetLinkState (); + + while(link != ARM_ETH_LINK_UP){ + link = Driver_ETH_PHY0.GetLinkState (); + } + + info = Driver_ETH_PHY0.GetLinkInfo (); + mac->Control(ARM_ETH_MAC_CONFIGURE, + info.speed << ARM_ETH_MAC_SPEED_Pos | + info.duplex << ARM_ETH_MAC_DUPLEX_Pos | + ARM_ETH_MAC_ADDRESS_BROADCAST); + mac->Control(ARM_ETH_MAC_CONTROL_TX, 1); + mac->Control(ARM_ETH_MAC_CONTROL_RX, 1); + return pdPASS; + } + else{ + //error + return pdFALSE; + } } /*-----------------------------------------------------------*/ -static void prvDMATxDescListInit() -{ - ETH_DMADescTypeDef * pxDMADescriptor; - BaseType_t xIndex; - /* Get the pointer on the first member of the descriptor list */ - pxDMADescriptor = DMATxDscrTab; - - /* Fill each DMA descriptor with the right values */ - for( xIndex = 0; xIndex < ETH_TXBUFNB; xIndex++, pxDMADescriptor++ ) - { - /* Set Second Address Chained bit */ - pxDMADescriptor->Status = ETH_DMATXDESC_TCH; - - #if ( ipconfigZERO_COPY_TX_DRIVER == 0 ) - { - /* Set Buffer1 address pointer */ - pxDMADescriptor->Buffer1Addr = ( uint32_t ) ( Tx_Buff[ xIndex ] ); - } - #endif - - if( xETH.Init.ChecksumMode == ETH_CHECKSUM_BY_HARDWARE ) - { - /* Set the DMA Tx descriptors checksum insertion for TCP, UDP, and ICMP */ - pxDMADescriptor->Status |= ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL; - } - else - { - pxDMADescriptor->Status &= ~( ( uint32_t ) ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL ); - } - - /* Initialize the next descriptor with the Next Descriptor Polling Enable */ - if( xIndex < ETH_TXBUFNB - 1 ) - { - /* Set next descriptor address register with next descriptor base address */ - pxDMADescriptor->Buffer2NextDescAddr = ( uint32_t ) ( pxDMADescriptor + 1 ); - } - else - { - /* For last descriptor, set next descriptor address register equal to the first descriptor base address */ - pxDMADescriptor->Buffer2NextDescAddr = ( uint32_t ) DMATxDscrTab; - } - } - - /* Set Transmit Descriptor List Address Register */ - xETH.Instance->DMATDLAR = ( uint32_t ) DMATxDscrTab; +/* send tcp/ip buffer to mac buffer */ +static void sendData(uint8_t *pucEthernetBuffer,size_t xDataLength){ + if(mac->SendFrame(pucEthernetBuffer,xDataLength,ARM_ETH_MAC_TX_FRAME_EVENT|ARM_ETH_MAC_TX_FRAME_TIMESTAMP) == ARM_DRIVER_OK){ + //success + } + else{ + //error + } } -/*-----------------------------------------------------------*/ -static void prvDMARxDescListInit() -{ - ETH_DMADescTypeDef * pxDMADescriptor; - BaseType_t xIndex; - /* - * RX-descriptors. - */ +/* send frame */ +#if ( ipconfigZERO_COPY_TX_DRIVER == 0) +/*the Simple network interfaces ,just use Ethernet peripheral driver library functions to copy +data from the FreeRTOS+TCP buffer into the peripheral driver's own buffer.*/ +BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxDescriptor,BaseType_t xReleaseAfterSend ){ + /* Simple network interfaces (as opposed to more efficient zero copy network + interfaces) just use Ethernet peripheral driver library functions to copy + data from the FreeRTOS+TCP buffer into the peripheral driver's own buffer. + This example assumes SendData() is a peripheral driver library function that + takes a pointer to the start of the data to be sent and the length of the + data to be sent as two separate parameters. The start of the data is located + by pxDescriptor->pucEthernetBuffer. The length of the data is located + by pxDescriptor->xDataLength. */ + sendData( pxDescriptor->pucEthernetBuffer, pxDescriptor->xDataLength ); - /* Get the pointer on the first member of the descriptor list */ - pxDMADescriptor = DMARxDscrTab; + /* Call the standard trace macro to log the send event. */ + iptraceNETWORK_INTERFACE_TRANSMIT(); - /* Fill each DMA descriptor with the right values */ - for( xIndex = 0; xIndex < ETH_RXBUFNB; xIndex++, pxDMADescriptor++ ) - { - /* Set Buffer1 size and Second Address Chained bit */ - pxDMADescriptor->ControlBufferSize = ETH_DMARXDESC_RCH | EMAC_DMA_BUFFER_SIZE; - - #if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) - { - /* Set Buffer1 address pointer */ - NetworkBufferDescriptor_t * pxBuffer; - - pxBuffer = pxGetNetworkBufferWithDescriptor( EMAC_DMA_BUFFER_SIZE, 100ul ); - - /* If the assert below fails, make sure that there are at least 'ETH_RXBUFNB' - * Network Buffers available during start-up ( ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ) */ - configASSERT( pxBuffer != NULL ); - - if( pxBuffer != NULL ) - { - pxDMADescriptor->Buffer1Addr = ( uint32_t ) pxBuffer->pucEthernetBuffer; - pxDMADescriptor->Status = ETH_DMARXDESC_OWN; - } - } - #else /* if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) */ - { - /* Set Buffer1 address pointer */ - pxDMADescriptor->Buffer1Addr = ( uint32_t ) ( Rx_Buff[ xIndex ] ); - /* Set Own bit of the Rx descriptor Status */ - pxDMADescriptor->Status = ETH_DMARXDESC_OWN; - } - #endif /* if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) */ - - /* Initialize the next descriptor with the Next Descriptor Polling Enable */ - if( xIndex < ETH_RXBUFNB - 1 ) - { - /* Set next descriptor address register with next descriptor base address */ - pxDMADescriptor->Buffer2NextDescAddr = ( uint32_t ) ( pxDMADescriptor + 1 ); - } - else - { - /* For last descriptor, set next descriptor address register equal to the first descriptor base address */ - pxDMADescriptor->Buffer2NextDescAddr = ( uint32_t ) DMARxDscrTab; - } - } - - /* Set Receive Descriptor List Address Register */ - xETH.Instance->DMARDLAR = ( uint32_t ) DMARxDscrTab; -} -/*-----------------------------------------------------------*/ - -#if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_MDNS != 0 ) - static void prvMACAddressConfig( ETH_HandleTypeDef * heth, - uint32_t ulIndex, - uint8_t * Addr ) - { - uint32_t ulTempReg; - - ( void ) heth; - - /* Calculate the selected MAC address high register. */ - ulTempReg = 0x80000000ul | ( ( uint32_t ) Addr[ 5 ] << 8 ) | ( uint32_t ) Addr[ 4 ]; - - /* Load the selected MAC address high register. */ - ( *( __IO uint32_t * ) ( ( uint32_t ) ( ETH_MAC_ADDR_HBASE + ulIndex ) ) ) = ulTempReg; - - /* Calculate the selected MAC address low register. */ - ulTempReg = ( ( uint32_t ) Addr[ 3 ] << 24 ) | ( ( uint32_t ) Addr[ 2 ] << 16 ) | ( ( uint32_t ) Addr[ 1 ] << 8 ) | Addr[ 0 ]; - - /* Load the selected MAC address low register */ - ( *( __IO uint32_t * ) ( ( uint32_t ) ( ETH_MAC_ADDR_LBASE + ulIndex ) ) ) = ulTempReg; - } -#endif /* if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_MDNS != 0 ) */ -/*-----------------------------------------------------------*/ - -BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxDescriptor, - BaseType_t bReleaseAfterSend ) -{ - BaseType_t xReturn = pdFAIL; - uint32_t ulTransmitSize = 0; - __IO ETH_DMADescTypeDef * pxDmaTxDesc; -/* Do not wait too long for a free TX DMA buffer. */ - const TickType_t xBlockTimeTicks = pdMS_TO_TICKS( 50u ); - - /* Open a do {} while ( 0 ) loop to be able to call break. */ - do - { - #if ( ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM != 0 ) - { - ProtocolPacket_t * pxPacket; - - /* If the peripheral must calculate the checksum, it wants - * the protocol checksum to have a value of zero. */ - pxPacket = ( ProtocolPacket_t * ) ( pxDescriptor->pucEthernetBuffer ); - - if( pxPacket->xICMPPacket.xIPHeader.ucProtocol == ( uint8_t ) ipPROTOCOL_ICMP ) - { - pxPacket->xICMPPacket.xICMPHeader.usChecksum = ( uint16_t ) 0u; - } - } - #endif /* ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM */ - - if( xPhyObject.ulLinkStatusMask != 0 ) - { - if( xSemaphoreTake( xTXDescriptorSemaphore, xBlockTimeTicks ) != pdPASS ) - { - /* Time-out waiting for a free TX descriptor. */ - break; - } - - /* This function does the actual transmission of the packet. The packet is - * contained in 'pxDescriptor' that is passed to the function. */ - pxDmaTxDesc = xETH.TxDesc; - - /* Is this buffer available? */ - configASSERT( ( pxDmaTxDesc->Status & ETH_DMATXDESC_OWN ) == 0 ); - - { - /* Is this buffer available? */ - /* Get bytes in current buffer. */ - ulTransmitSize = pxDescriptor->xDataLength; - - if( ulTransmitSize > EMAC_DMA_BUFFER_SIZE ) - { - ulTransmitSize = EMAC_DMA_BUFFER_SIZE; - } - - #if ( ipconfigZERO_COPY_TX_DRIVER == 0 ) - { - /* Copy the bytes. */ - memcpy( ( void * ) pxDmaTxDesc->Buffer1Addr, pxDescriptor->pucEthernetBuffer, ulTransmitSize ); - } - #else - { - configASSERT( bReleaseAfterSend != 0 ); - - /* Move the buffer. */ - pxDmaTxDesc->Buffer1Addr = ( uint32_t ) pxDescriptor->pucEthernetBuffer; - /* The Network Buffer has been passed to DMA, no need to release it. */ - bReleaseAfterSend = pdFALSE_UNSIGNED; - } - #endif /* ipconfigZERO_COPY_TX_DRIVER */ - - /* Ask to set the IPv4 checksum. - * Also need an Interrupt on Completion so that 'vClearTXBuffers()' will be called.. */ - #if ( ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM != 0 ) - { - pxDmaTxDesc->Status |= ETH_DMATXDESC_CIC_TCPUDPICMP_FULL | ETH_DMATXDESC_IC; - } - #else - { - pxDmaTxDesc->Status &= ~( ( uint32_t ) ETH_DMATXDESC_CIC ); - pxDmaTxDesc->Status |= ETH_DMATXDESC_IC; - } - #endif - - - /* Prepare transmit descriptors to give to DMA. */ - - /* Set LAST and FIRST segment */ - pxDmaTxDesc->Status |= ETH_DMATXDESC_FS | ETH_DMATXDESC_LS; - /* Set frame size */ - pxDmaTxDesc->ControlBufferSize = ( ulTransmitSize & ETH_DMATXDESC_TBS1 ); - - #if ( NETWORK_BUFFERS_CACHED != 0 ) - { - BaseType_t xlength = CACHE_LINE_SIZE * ( ( ulTransmitSize + NETWORK_BUFFER_HEADER_SIZE + CACHE_LINE_SIZE - 1 ) / CACHE_LINE_SIZE ); - uint32_t * pulBuffer = ( uint32_t ) ( pxDescriptor->pucEthernetBuffer - NETWORK_BUFFER_HEADER_SIZE ); - cache_clean_invalidate_by_addr( pulBuffer, xlength ); - } - #endif - - /* Set Own bit of the Tx descriptor Status: gives the buffer back to ETHERNET DMA */ - pxDmaTxDesc->Status |= ETH_DMATXDESC_OWN; - - /* Point to next descriptor */ - xETH.TxDesc = ( ETH_DMADescTypeDef * ) ( xETH.TxDesc->Buffer2NextDescAddr ); - /* Ensure completion of memory access */ - __DSB(); - /* Resume DMA transmission*/ - xETH.Instance->DMATPDR = 0; - iptraceNETWORK_INTERFACE_TRANSMIT(); - xReturn = pdPASS; - } - } - else - { - /* The PHY has no Link Status, packet shall be dropped. */ - } - } while( 0 ); - - /* The buffer has been sent so can be released. */ - if( bReleaseAfterSend != pdFALSE ) + if( xReleaseAfterSend != pdFALSE ) { + /* It is assumed SendData() copies the data out of the FreeRTOS+TCP Ethernet + buffer. The Ethernet buffer is therefore no longer needed, and must be + freed for re-use. */ vReleaseNetworkBufferAndDescriptor( pxDescriptor ); } - return xReturn; -} -/*-----------------------------------------------------------*/ - -static BaseType_t xMayAcceptPacket( uint8_t * pucEthernetBuffer ) -{ - const ProtocolPacket_t * pxProtPacket = ( const ProtocolPacket_t * ) pucEthernetBuffer; - - switch( pxProtPacket->xTCPPacket.xEthernetHeader.usFrameType ) - { - case ipARP_FRAME_TYPE: - /* Check it later. */ - return pdTRUE; - - case ipIPv4_FRAME_TYPE: - /* Check it here. */ - break; - - default: - /* Refuse the packet. */ - return pdFALSE; - } - - #if ( ipconfigETHERNET_DRIVER_FILTERS_PACKETS == 1 ) - { - const IPHeader_t * pxIPHeader = &( pxProtPacket->xTCPPacket.xIPHeader ); - uint32_t ulDestinationIPAddress; - - /* Ensure that the incoming packet is not fragmented (only outgoing packets - * can be fragmented) as these are the only handled IP frames currently. */ - if( ( pxIPHeader->usFragmentOffset & ipFRAGMENT_OFFSET_BIT_MASK ) != 0U ) - { - return pdFALSE; - } - - /* HT: Might want to make the following configurable because - * most IP messages have a standard length of 20 bytes */ - - /* 0x45 means: IPv4 with an IP header of 5 x 4 = 20 bytes - * 0x47 means: IPv4 with an IP header of 7 x 4 = 28 bytes */ - if( ( pxIPHeader->ucVersionHeaderLength < 0x45 ) || ( pxIPHeader->ucVersionHeaderLength > 0x4F ) ) - { - return pdFALSE; - } - - ulDestinationIPAddress = pxIPHeader->ulDestinationIPAddress; - - /* Is the packet for this node? */ - if( ( ulDestinationIPAddress != *ipLOCAL_IP_ADDRESS_POINTER ) && - /* Is it a broadcast address x.x.x.255 ? */ - ( ( FreeRTOS_ntohl( ulDestinationIPAddress ) & 0xff ) != 0xff ) && - #if ( ipconfigUSE_LLMNR == 1 ) - ( ulDestinationIPAddress != ipLLMNR_IP_ADDR ) && - #endif - ( *ipLOCAL_IP_ADDRESS_POINTER != 0 ) ) - { - FreeRTOS_printf( ( "Drop IP %lxip\n", FreeRTOS_ntohl( ulDestinationIPAddress ) ) ); - return pdFALSE; - } - - if( pxIPHeader->ucProtocol == ipPROTOCOL_UDP ) - { - #if ( ipconfigUSE_LLMNR == 1 ) || ( ipconfigUSE_MDNS == 1 ) || ( ipconfigUSE_NBNS == 1 ) || ( ipconfigUSE_DNS == 1 ) - uint16_t usSourcePort = FreeRTOS_ntohs( pxProtPacket->xUDPPacket.xUDPHeader.usSourcePort ); - uint16_t usDestinationPort = FreeRTOS_ntohs( pxProtPacket->xUDPPacket.xUDPHeader.usDestinationPort ); - #endif - - if( ( xPortHasUDPSocket( pxProtPacket->xUDPPacket.xUDPHeader.usDestinationPort ) == pdFALSE ) - #if ipconfigUSE_LLMNR == 1 - && ( usDestinationPort != ipLLMNR_PORT ) && - ( usSourcePort != ipLLMNR_PORT ) - #endif - #if ipconfigUSE_MDNS == 1 - && ( usDestinationPort != ipMDNS_PORT ) && - ( usSourcePort != ipMDNS_PORT ) - #endif - #if ipconfigUSE_NBNS == 1 - && ( usDestinationPort != ipNBNS_PORT ) && - ( usSourcePort != ipNBNS_PORT ) - #endif - #if ipconfigUSE_DNS == 1 - && ( usSourcePort != ipDNS_PORT ) - #endif - ) - { - /* Drop this packet, not for this device. */ - /* FreeRTOS_printf( ( "Drop: UDP port %d -> %d\n", usSourcePort, usDestinationPort ) ); */ - return pdFALSE; - } - } - } - #endif /* ipconfigETHERNET_DRIVER_FILTERS_PACKETS */ return pdTRUE; } +#else +/*zero copy method here*/ + +#endif /*-----------------------------------------------------------*/ -static void prvPassEthMessages( NetworkBufferDescriptor_t * pxDescriptor ) -{ - IPStackEvent_t xRxEvent; +/*receive data func , will be notify after ARM_ETH_MAC_EVENT_RX_FRAME event*/ +#if (ipconfigZERO_COPY_RX_DRIVER==0) +static void receiveHandlerTask( void *pvParameters ){ + NetworkBufferDescriptor_t *receiveBufferDescriptor; + size_t xBytesReceived; + /* Used to indicate that xSendEventStructToIPTask() is being called becauseof an Ethernet receive event. */ + IPStackEvent_t xRxEvent; + + while(1){ + /* Wait for the Ethernet MAC interrupt to indicate that another packet + has been received. The task notification is used in a similar way to a + counting semaphore to count Rx events, but is a lot more efficient than + a semaphore. */ + ulTaskNotifyTake( pdFALSE, portMAX_DELAY ); + + /* See how much data was received. Here it is assumed ReceiveSize() is + a peripheral driver function that returns the number of bytes in the + received Ethernet frame. */ + xBytesReceived = mac->GetRxFrameSize(); + + if( xBytesReceived > 0 ){ + /* Allocate a network buffer descriptor that points to a buffer + large enough to hold the received frame. As this is the simple + rather than efficient example the received data will just be copied + into this buffer. */ + receiveBufferDescriptor = pxGetNetworkBufferWithDescriptor( xBytesReceived, 0 ); + if( receiveBufferDescriptor != NULL ){ + /* pxBufferDescriptor->pucEthernetBuffer now points to an Ethernet + buffer large enough to hold the received data. Copy the + received data into pcNetworkBuffer->pucEthernetBuffer. Here it + is assumed ReceiveData() is a peripheral driver function that + copies the received data into a buffer passed in as the function's + parameter. Remember! While is is a simple robust technique - + it is not efficient. An example that uses a zero copy technique + is provided further down this page. */ + mac->ReadFrame(receiveBufferDescriptor->pucEthernetBuffer,xBytesReceived); + receiveBufferDescriptor->xDataLength = xBytesReceived; + + /* See if the data contained in the received Ethernet frame needs + to be processed. NOTE! It is preferable to do this in + the interrupt service routine itself, which would remove the need + to unblock this task for packets that don't need processing. */ + if( eConsiderFrameForProcessing( receiveBufferDescriptor->pucEthernetBuffer )== eProcessBuffer ){ + /* The event about to be sent to the TCP/IP is an Rx event. */ + xRxEvent.eEventType = eNetworkRxEvent; - xRxEvent.eEventType = eNetworkRxEvent; - xRxEvent.pvData = ( void * ) pxDescriptor; + /* pvData is used to point to the network buffer descriptor that + now references the received data. */ + xRxEvent.pvData = ( void * ) receiveBufferDescriptor; + + /* Send the data to the TCP/IP stack. */ + if( xSendEventStructToIPTask( &xRxEvent, 0 ) == pdFALSE ){ + /* The buffer could not be sent to the IP task so the buffer must be released. */ + vReleaseNetworkBufferAndDescriptor( receiveBufferDescriptor ); - if( xSendEventStructToIPTask( &xRxEvent, ( TickType_t ) 1000 ) != pdPASS ) - { - /* The buffer could not be sent to the stack so must be released again. - * This is a deferred handler task, not a real interrupt, so it is ok to - * use the task level function here. */ - #if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) - { - do - { - NetworkBufferDescriptor_t * pxNext = pxDescriptor->pxNextBuffer; - vReleaseNetworkBufferAndDescriptor( pxDescriptor ); - pxDescriptor = pxNext; - } while( pxDescriptor != NULL ); - } - #else - { - vReleaseNetworkBufferAndDescriptor( pxDescriptor ); - } - #endif /* ipconfigUSE_LINKED_RX_MESSAGES */ - iptraceETHERNET_RX_EVENT_LOST(); - FreeRTOS_printf( ( "prvPassEthMessages: Can not queue return packet!\n" ) ); - } - else - { - iptraceNETWORK_INTERFACE_RECEIVE(); - } + /* Make a call to the standard trace macro to log the occurrence. */ + iptraceETHERNET_RX_EVENT_LOST(); + }else{ + /* The message was successfully sent to the TCP/IP stack. + Call the standard trace macro to log the occurrence. */ + iptraceNETWORK_INTERFACE_RECEIVE(); + } + }else{ + /* The Ethernet frame can be dropped, but the Ethernet buffer + must be released. */ + vReleaseNetworkBufferAndDescriptor( receiveBufferDescriptor ); + } + + }else{ + /* The event was lost because a network buffer was not available. + Call the standard trace macro to log the occurrence. */ + iptraceETHERNET_RX_EVENT_LOST(); + } + } + } } +#else +/*zero copy method here*/ -static BaseType_t prvNetworkInterfaceInput( void ) -{ - #if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) - NetworkBufferDescriptor_t * pxFirstDescriptor = NULL; - NetworkBufferDescriptor_t * pxLastDescriptor = NULL; - #endif - BaseType_t xReceivedLength = 0; - __IO ETH_DMADescTypeDef * pxDMARxDescriptor; - const TickType_t xDescriptorWaitTime = pdMS_TO_TICKS( niDESCRIPTOR_WAIT_TIME_MS ); - uint8_t * pucBuffer; +#endif + - pxDMARxDescriptor = xETH.RxDesc; - - while( ( pxDMARxDescriptor->Status & ETH_DMARXDESC_OWN ) == 0u ) - { - NetworkBufferDescriptor_t * pxCurDescriptor; - NetworkBufferDescriptor_t * pxNewDescriptor = NULL; - BaseType_t xAccepted = pdTRUE; - - /* Get the Frame Length of the received packet: subtract 4 bytes of the CRC */ - xReceivedLength = ( ( pxDMARxDescriptor->Status & ETH_DMARXDESC_FL ) >> ETH_DMARXDESC_FRAMELENGTHSHIFT ) - 4; - - pucBuffer = ( uint8_t * ) pxDMARxDescriptor->Buffer1Addr; - - /* Update the ETHERNET DMA global Rx descriptor with next Rx descriptor */ - /* Chained Mode */ - /* Selects the next DMA Rx descriptor list for next buffer to read */ - xETH.RxDesc = ( ETH_DMADescTypeDef * ) pxDMARxDescriptor->Buffer2NextDescAddr; - - /* In order to make the code easier and faster, only packets in a single buffer - * will be accepted. This can be done by making the buffers large enough to - * hold a complete Ethernet packet, minus ipBUFFER_PADDING. - * Therefore, two sanity checks: */ - configASSERT( xReceivedLength <= EMAC_DMA_BUFFER_SIZE ); - - if( ( pxDMARxDescriptor->Status & ( ETH_DMARXDESC_CE | ETH_DMARXDESC_IPV4HCE | ETH_DMARXDESC_FT ) ) != ETH_DMARXDESC_FT ) - { - /* Not an Ethernet frame-type or a checksum error. */ - xAccepted = pdFALSE; - } - else - { - /* See if this packet must be handled. */ - xAccepted = xMayAcceptPacket( pucBuffer ); - } - - if( xAccepted != pdFALSE ) - { - /* The packet will be accepted, but check first if a new Network Buffer can - * be obtained. If not, the packet will still be dropped. */ - pxNewDescriptor = pxGetNetworkBufferWithDescriptor( EMAC_DMA_BUFFER_SIZE, xDescriptorWaitTime ); - - if( pxNewDescriptor == NULL ) - { - /* A new descriptor can not be allocated now. This packet will be dropped. */ - xAccepted = pdFALSE; - } - } - - #if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) - { - /* Find out which Network Buffer was originally passed to the descriptor. */ - pxCurDescriptor = pxPacketBuffer_to_NetworkBuffer( pucBuffer ); - configASSERT( pxCurDescriptor != NULL ); - } - #else - { - /* In this mode, the two descriptors are the same. */ - pxCurDescriptor = pxNewDescriptor; - - if( pxNewDescriptor != NULL ) - { - /* The packet is accepted and a new Network Buffer was created, - * copy data to the Network Buffer. */ - memcpy( pxNewDescriptor->pucEthernetBuffer, pucBuffer, xReceivedLength ); - } - } - #endif /* if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) */ - - if( xAccepted != pdFALSE ) - { - pxCurDescriptor->xDataLength = xReceivedLength; - #if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) - { - pxCurDescriptor->pxNextBuffer = NULL; - - if( pxFirstDescriptor == NULL ) - { - /* Becomes the first message */ - pxFirstDescriptor = pxCurDescriptor; - } - else if( pxLastDescriptor != NULL ) - { - /* Add to the tail */ - pxLastDescriptor->pxNextBuffer = pxCurDescriptor; - } - - pxLastDescriptor = pxCurDescriptor; - } - #else /* if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) */ - { - prvPassEthMessages( pxCurDescriptor ); - } - #endif /* if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) */ - } - - /* Release descriptors to DMA */ - #if ( ipconfigZERO_COPY_RX_DRIVER != 0 ) - { - /* Set Buffer1 address pointer */ - if( pxNewDescriptor != NULL ) - { - pxDMARxDescriptor->Buffer1Addr = ( uint32_t ) pxNewDescriptor->pucEthernetBuffer; - } - else - { - /* The packet was dropped and the same Network - * Buffer will be used to receive a new packet. */ - } - } - #endif /* ipconfigZERO_COPY_RX_DRIVER */ - - /* Set Buffer1 size and Second Address Chained bit */ - pxDMARxDescriptor->ControlBufferSize = ETH_DMARXDESC_RCH | EMAC_DMA_BUFFER_SIZE; - pxDMARxDescriptor->Status = ETH_DMARXDESC_OWN; - - /* Ensure completion of memory access */ - __DSB(); - - /* When Rx Buffer unavailable flag is set clear it and resume - * reception. */ - if( ( xETH.Instance->DMASR & ETH_DMASR_RBUS ) != 0 ) - { - /* Clear RBUS ETHERNET DMA flag. */ - xETH.Instance->DMASR = ETH_DMASR_RBUS; - - /* Resume DMA reception. */ - xETH.Instance->DMARPDR = 0; - } - - pxDMARxDescriptor = xETH.RxDesc; - } - - #if ( ipconfigUSE_LINKED_RX_MESSAGES != 0 ) - { - if( pxFirstDescriptor != NULL ) - { - prvPassEthMessages( pxFirstDescriptor ); - } - } - #endif /* ipconfigUSE_LINKED_RX_MESSAGES */ - - return( xReceivedLength > 0 ); -} -/*-----------------------------------------------------------*/ - - -BaseType_t xSTM32_PhyRead( BaseType_t xAddress, - BaseType_t xRegister, - uint32_t * pulValue ) -{ - uint16_t usPrevAddress = xETH.Init.PhyAddress; - BaseType_t xResult; - HAL_StatusTypeDef xHALResult; - - xETH.Init.PhyAddress = xAddress; - xHALResult = HAL_ETH_ReadPHYRegister( &xETH, ( uint16_t ) xRegister, pulValue ); - xETH.Init.PhyAddress = usPrevAddress; - - if( xHALResult == HAL_OK ) - { - xResult = 0; - } - else - { - xResult = -1; - } - - return xResult; -} -/*-----------------------------------------------------------*/ - -BaseType_t xSTM32_PhyWrite( BaseType_t xAddress, - BaseType_t xRegister, - uint32_t ulValue ) -{ - uint16_t usPrevAddress = xETH.Init.PhyAddress; - BaseType_t xResult; - HAL_StatusTypeDef xHALResult; - - xETH.Init.PhyAddress = xAddress; - xHALResult = HAL_ETH_WritePHYRegister( &xETH, ( uint16_t ) xRegister, ulValue ); - xETH.Init.PhyAddress = usPrevAddress; - - if( xHALResult == HAL_OK ) - { - xResult = 0; - } - else - { - xResult = -1; - } - - return xResult; -} -/*-----------------------------------------------------------*/ - -void vMACBProbePhy( void ) -{ - vPhyInitialise( &xPhyObject, xSTM32_PhyRead, xSTM32_PhyWrite ); - xPhyDiscover( &xPhyObject ); - xPhyConfigure( &xPhyObject, &xPHYProperties ); -} -/*-----------------------------------------------------------*/ - -static void prvEthernetUpdateConfig( BaseType_t xForce ) -{ - FreeRTOS_printf( ( "prvEthernetUpdateConfig: LS mask %02lX Force %d\n", - xPhyObject.ulLinkStatusMask, - ( int ) xForce ) ); - - if( ( xForce != pdFALSE ) || ( xPhyObject.ulLinkStatusMask != 0 ) ) - { - /* Restart the auto-negotiation. */ - if( xETH.Init.AutoNegotiation != ETH_AUTONEGOTIATION_DISABLE ) - { - xPhyStartAutoNegotiation( &xPhyObject, xPhyGetMask( &xPhyObject ) ); - - /* Configure the MAC with the Duplex Mode fixed by the - * auto-negotiation process. */ - if( xPhyObject.xPhyProperties.ucDuplex == PHY_DUPLEX_FULL ) - { - xETH.Init.DuplexMode = ETH_MODE_FULLDUPLEX; - } - else - { - xETH.Init.DuplexMode = ETH_MODE_HALFDUPLEX; - } - - /* Configure the MAC with the speed fixed by the - * auto-negotiation process. */ - if( xPhyObject.xPhyProperties.ucSpeed == PHY_SPEED_10 ) - { - xETH.Init.Speed = ETH_SPEED_10M; - } - else - { - xETH.Init.Speed = ETH_SPEED_100M; - } - } - else /* AutoNegotiation Disable */ - { - /* Check parameters */ - assert_param( IS_ETH_SPEED( xETH.Init.Speed ) ); - assert_param( IS_ETH_DUPLEX_MODE( xETH.Init.DuplexMode ) ); - - if( xETH.Init.DuplexMode == ETH_MODE_FULLDUPLEX ) - { - xPhyObject.xPhyPreferences.ucDuplex = PHY_DUPLEX_HALF; - } - else - { - xPhyObject.xPhyPreferences.ucDuplex = PHY_DUPLEX_FULL; - } - - if( xETH.Init.Speed == ETH_SPEED_10M ) - { - xPhyObject.xPhyPreferences.ucSpeed = PHY_SPEED_10; - } - else - { - xPhyObject.xPhyPreferences.ucSpeed = PHY_SPEED_100; - } - - xPhyObject.xPhyPreferences.ucMDI_X = PHY_MDIX_AUTO; - - /* Use predefined (fixed) configuration. */ - xPhyFixedValue( &xPhyObject, xPhyGetMask( &xPhyObject ) ); - } - - /* ETHERNET MAC Re-Configuration */ - HAL_ETH_ConfigMAC( &xETH, ( ETH_MACInitTypeDef * ) NULL ); - - /* Restart MAC interface */ - HAL_ETH_Start( &xETH ); - } - else - { - /* Stop MAC interface */ - HAL_ETH_Stop( &xETH ); - } -} -/*-----------------------------------------------------------*/ - -BaseType_t xGetPhyLinkStatus( void ) -{ - BaseType_t xReturn; - - if( xPhyObject.ulLinkStatusMask != 0 ) - { - xReturn = pdPASS; - } - else - { - xReturn = pdFAIL; - } - - return xReturn; -} -/*-----------------------------------------------------------*/ - -/* Uncomment this in case BufferAllocation_1.c is used. */ - -void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] ) -{ - static - #if defined( STM32F7xx ) - __attribute__( ( section( ".first_data" ) ) ) - #endif - uint8_t ucNetworkPackets[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS * ETH_MAX_PACKET_SIZE ] __attribute__( ( aligned( 32 ) ) ); - uint8_t * ucRAMBuffer = ucNetworkPackets; - uint32_t ul; - - for( ul = 0; ul < ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS; ul++ ) - { - pxNetworkBuffers[ ul ].pucEthernetBuffer = ucRAMBuffer + ipBUFFER_PADDING; - *( ( unsigned * ) ucRAMBuffer ) = ( unsigned ) ( &( pxNetworkBuffers[ ul ] ) ); - ucRAMBuffer += ETH_MAX_PACKET_SIZE; - } -} -/*-----------------------------------------------------------*/ - -static void prvEMACHandlerTask( void * pvParameters ) -{ - UBaseType_t uxCurrentCount; - BaseType_t xResult; - const TickType_t ulMaxBlockTime = pdMS_TO_TICKS( 100UL ); - uint32_t ulISREvents = 0U; - - /* Remove compiler warnings about unused parameters. */ - ( void ) pvParameters; - - for( ; ; ) - { - xResult = 0; - - #if ( ipconfigHAS_PRINTF != 0 ) - { - /* Call a function that monitors resources: the amount of free network - * buffers and the amount of free space on the heap. See FreeRTOS_IP.c - * for more detailed comments. */ - vPrintResourceStats(); - } - #endif /* ( ipconfigHAS_PRINTF != 0 ) */ - - if( xTXDescriptorSemaphore != NULL ) - { - static UBaseType_t uxLowestSemCount = ( UBaseType_t ) ETH_TXBUFNB - 1; - - uxCurrentCount = uxSemaphoreGetCount( xTXDescriptorSemaphore ); - - if( uxLowestSemCount > uxCurrentCount ) - { - uxLowestSemCount = uxCurrentCount; - FreeRTOS_printf( ( "TX DMA buffers: lowest %lu\n", uxLowestSemCount ) ); - } - } - - /* Wait for a new event or a time-out. */ - xTaskNotifyWait( 0U, /* ulBitsToClearOnEntry */ - EMAC_IF_ALL_EVENT, /* ulBitsToClearOnExit */ - &( ulISREvents ), /* pulNotificationValue */ - ulMaxBlockTime ); - - if( ( ulISREvents & EMAC_IF_RX_EVENT ) != 0 ) - { - xResult = prvNetworkInterfaceInput(); - } - - if( ( ulISREvents & EMAC_IF_TX_EVENT ) != 0 ) - { - /* Code to release TX buffers in case zero-copy is used. */ - /* Check if DMA packets have been delivered. */ - vClearTXBuffers(); - } - - if( ( ulISREvents & EMAC_IF_ERR_EVENT ) != 0 ) - { - /* Future extension: logging about errors that occurred. */ - } - - if( xPhyCheckLinkStatus( &xPhyObject, xResult ) != 0 ) - { - /* Something has changed to a Link Status, need re-check. */ - prvEthernetUpdateConfig( pdFALSE ); - } - } -} -/*-----------------------------------------------------------*/ - -void ETH_IRQHandler( void ) -{ - HAL_ETH_IRQHandler( &xETH ); -} diff --git a/Test_project_for_GD32107C-EVAL.uvguix.right b/Test_project_for_GD32107C-EVAL.uvguix.right index 9cd613d..292cbf8 100644 --- a/Test_project_for_GD32107C-EVAL.uvguix.right +++ b/Test_project_for_GD32107C-EVAL.uvguix.right @@ -70,7 +70,7 @@ 466 Source Browser 500 - 166 + 300 @@ -110,8 +110,8 @@ 0 - 1973 - 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898 @@ -3603,84 +3603,75 @@ 0 100 - 12 + 10 - .\DemoTasks\SimpleTCPEchoServer.c - 0 - 140 - 150 + .\FreeRTOS\source\portable\NetworkInterface\board_family\NetworkInterface.c + 25 + 1479 + 1451 1 0 - .\main.c - 0 - 212 - 222 + C:\Users\User\AppData\Local\Arm\Packs\ARM\CMSIS\5.9.0\CMSIS\Driver\Include\Driver_ETH_MAC.h + 1 + 280 + 280 1 0 - .\FreeRTOS\source\FreeRTOS_IP.c - 0 - 823 - 838 - 1 - - 0 - - - FreeRTOS\source\include\FreeRTOSIPConfigDefaults.h - 42 - 313 - 348 - 1 - - 0 - - - .\FreeRTOS\source\FreeRTOS_IP_Utils.c - 0 - 419 - 429 - 1 - - 0 - - - FreeRTOS\source\include\FreeRTOS_IP.h - 36 - 286 + RTE/Device/GD32F107VC/gd32f10x_enet.c + 1 + 307 322 1 0 - FreeRTOS\source\include\FreeRTOSIPConfig.h - 38 - 1 - 42 - 1 - - 0 - - - RTE/RTOS/FreeRTOSConfig.h - 57 - 151 - 53 - 1 - - 0 - - - C:/Users/User/AppData/Local/Arm/Packs/ARM/CMSIS-FreeRTOS/10.5.1/Source/event_groups.c + C:\Users\User\AppData\Local\Arm\Packs\GigaDevice\GD32F10x_DFP\2.0.3\Device\Firmware\Peripherals\inc\gd32f10x_enet.h 0 - 188 - 198 + 40 + 41 + 1 + + 0 + + + FreeRTOS\source\include\NetworkInterface.h + 21 + 33 + 59 + 1 + + 0 + + + C:\Users\User\AppData\Local\Arm\Packs\ARM\CMSIS\5.9.0\CMSIS\Driver\Include\Driver_Common.h + 2 + 16 + 66 + 1 + + 0 + + + C:\Users\User\AppData\Local\Arm\Packs\GigaDevice\GD32F10x_DFP\2.0.3\Device\Include\gd32f10x.h + 0 + 299 + 315 + 1 + + 0 + + + C:/Users/User/AppData/Local/Arm/Packs/ARM/CMSIS-FreeRTOS/10.5.1/Source/tasks.c + 0 + 1210 + 1216 1 0 @@ -3695,28 +3686,19 @@ 0 - C:/Users/User/AppData/Local/Arm/Packs/ARM/CMSIS-FreeRTOS/10.5.1/Source/portable/GCC/ARM_CM3/port.c + .\main.c 0 - 269 - 294 + 535 + 572 1 0 - .\FreeRTOS\source\FreeRTOS_Sockets.c - 1 - 264 - 274 - 1 - - 0 - - - .\FreeRTOS\source\portable\NetworkInterface\board_family\NetworkInterface.c - 0 - 38 - 75 + C:\Keil_v5\ARM\ARMCLANG\include\stdbool.h + 22 + 1 + 15 1 0 diff --git a/Test_project_for_GD32107C-EVAL.uvoptx b/Test_project_for_GD32107C-EVAL.uvoptx index 1e41805..6124c5f 100644 --- a/Test_project_for_GD32107C-EVAL.uvoptx +++ b/Test_project_for_GD32107C-EVAL.uvoptx @@ -157,54 +157,70 @@ 0 0 - 476 + 1495 1 -
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0 @@ -262,6 +470,11 @@ 1 xBoundTCPSocketsList + + 2 + 1 + mac + @@ -379,7 +592,7 @@ FreeRTOS - 1 + 0 0 0 0 @@ -399,7 +612,7 @@ 2 6 1 - 1 + 0 0 0 .\FreeRTOS\source\FreeRTOS_IP.c @@ -666,8 +879,8 @@ 0 0 0 - .\FreeRTOS\source\portable\BufferManagement\BufferAllocation_1.c - BufferAllocation_1.c + .\FreeRTOS\source\portable\BufferManagement\BufferAllocation_2.c + BufferAllocation_2.c 0 0 @@ -683,7 +896,7 @@ ::CMSIS Driver - 0 + 1 0 0 1 @@ -699,7 +912,7 @@ ::Device - 0 + 1 0 0 1 diff --git a/Test_project_for_GD32107C-EVAL.uvprojx b/Test_project_for_GD32107C-EVAL.uvprojx index ce94176..257c5f2 100644 --- a/Test_project_for_GD32107C-EVAL.uvprojx +++ b/Test_project_for_GD32107C-EVAL.uvprojx @@ -526,9 +526,9 @@ .\FreeRTOS\source\portable\NetworkInterface\board_family\NetworkInterface.c - BufferAllocation_1.c + BufferAllocation_2.c 1 - .\FreeRTOS\source\portable\BufferManagement\BufferAllocation_1.c + .\FreeRTOS\source\portable\BufferManagement\BufferAllocation_2.c @@ -972,6 +972,12 @@ + + + + + + @@ -1060,6 +1066,14 @@ + + RTE\Device\GD32F107VC\gd32f10x_dma.c + + + + + + RTE\Device\GD32F107VC\gd32f10x_enet.c