Modified PLL2 out
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e9acfe19a2
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File diff suppressed because one or more lines are too long
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@ -175,10 +175,31 @@
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<Mm>
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<Mm>
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<WinNumber>1</WinNumber>
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<WinNumber>1</WinNumber>
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<SubType>0</SubType>
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<SubType>0</SubType>
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<ItemText>0x40011000</ItemText>
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<ItemText>0x40028014</ItemText>
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<AccSizeX>0</AccSizeX>
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<AccSizeX>0</AccSizeX>
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</Mm>
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</Mm>
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</MemoryWindow1>
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</MemoryWindow1>
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<MemoryWindow2>
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<Mm>
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<WinNumber>2</WinNumber>
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<SubType>0</SubType>
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<ItemText>0x20001FCC</ItemText>
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<AccSizeX>0</AccSizeX>
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</Mm>
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</MemoryWindow2>
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<MemoryWindow3>
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<Mm>
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<WinNumber>3</WinNumber>
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<SubType>0</SubType>
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<ItemText>reg</ItemText>
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<AccSizeX>0</AccSizeX>
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</Mm>
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</MemoryWindow3>
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<ScvdPack>
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<Filename>C:\Users\User\AppData\Local\Arm\Packs\ARM\CMSIS-FreeRTOS\10.5.1\CMSIS\RTOS2\FreeRTOS\FreeRTOS.scvd</Filename>
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<Type>ARM.CMSIS-FreeRTOS.10.5.1</Type>
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<SubType>1</SubType>
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</ScvdPack>
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<Tracepoint>
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<Tracepoint>
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<THDelay>0</THDelay>
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<THDelay>0</THDelay>
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</Tracepoint>
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</Tracepoint>
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22
main.c
22
main.c
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@ -32,6 +32,7 @@
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#define RMII_REF_CLK_PORT GPIOA
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#define RMII_REF_CLK_PORT GPIOA
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#define RMII_REF_CLK GPIO_PIN_1
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#define RMII_REF_CLK GPIO_PIN_1
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#define MCO GPIO_PIN_8
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#define RMII_MDC_PORT GPIOC
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#define RMII_MDC_PORT GPIOC
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#define RMII_MDC GPIO_PIN_1
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#define RMII_MDC GPIO_PIN_1
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@ -167,7 +168,7 @@ static ErrStatus vInitPLL2(void)
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/* enable PLL2 */
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/* enable PLL2 */
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RCU_CTL |= RCU_CTL_PLL2EN;
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RCU_CTL |= RCU_CTL_PLL2EN;
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/* wait till PLL2 is ready */
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/* wait till PLL2 is ready */
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while(0U == (RCU_CTL & RCU_CTL_PLL2STB)){
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while(RESET == rcu_flag_get(RCU_FLAG_PLL2STB)){
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};
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};
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return SUCCESS;
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return SUCCESS;
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}
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}
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@ -183,7 +184,10 @@ static void vInitMCU(void)
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rcu_periph_clock_enable(RCU_GPIOB);
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rcu_periph_clock_enable(RCU_GPIOB);
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rcu_periph_clock_enable(RCU_GPIOC);
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rcu_periph_clock_enable(RCU_GPIOC);
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rcu_periph_clock_enable(RCU_GPIOE);
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rcu_periph_clock_enable(RCU_GPIOE);
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rcu_periph_clock_enable(RCU_AF);
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rcu_periph_clock_enable(RCU_ENET);
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rcu_periph_clock_enable(RCU_ENETTX);
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rcu_periph_clock_enable(RCU_ENETRX);
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/*Enable PLL2 to generate 50MHz clocks */
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/*Enable PLL2 to generate 50MHz clocks */
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if (ERROR == vInitPLL2())
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if (ERROR == vInitPLL2())
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{
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{
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@ -194,14 +198,7 @@ static void vInitMCU(void)
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}
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}
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/*Put PLL2 clocks into CKOUT0(PA1) as ref clock for ethernet phy*/
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/*Put PLL2 clocks into CKOUT0(PA1) as ref clock for ethernet phy*/
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rcu_ckout0_config(RCU_CKOUT0SRC_CKPLL2);
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rcu_ckout0_config(RCU_CKOUT0SRC_CKPLL2);
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//rcu_periph_clock_enable(RCU_AF);
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rcu_periph_clock_enable(RCU_ENET);
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rcu_periph_clock_enable(RCU_ENETTX);
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rcu_periph_clock_enable(RCU_ENETRX);
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//rcu_periph_reset_enable(RCU_ENETRST);
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gpio_ethernet_phy_select(GPIO_ENET_PHY_RMII);
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gpio_ethernet_phy_select(GPIO_ENET_PHY_RMII);
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/*
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/*
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* Configure GPIO Alternate RMII function
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* Configure GPIO Alternate RMII function
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@ -213,12 +210,15 @@ static void vInitMCU(void)
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gpio_init(RMII_MDC_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_MDC);
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gpio_init(RMII_MDC_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_MDC);
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gpio_init(RMII_MDIO_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_MDIO);
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gpio_init(RMII_MDIO_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_MDIO);
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gpio_init(RMII_INT_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_INT);
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gpio_init(RMII_INT_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_INT);
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gpio_init(RMII_REF_CLK_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_REF_CLK);
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gpio_init(RMII_REF_CLK_PORT, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, RMII_REF_CLK);
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gpio_init(RMII_REF_CLK_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, MCO);
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//gpio_init(RMII_RXD_PORT, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, RMII_RXD0);
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//gpio_init(RMII_RXD_PORT, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, RMII_RXD0);
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//gpio_init(RMII_RXD_PORT, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, RMII_RXD1);
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//gpio_init(RMII_RXD_PORT, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, RMII_RXD1);
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//gpio_init(RMII_CRS_DV_PORT, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, RMII_CRS_DV);
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//gpio_init(RMII_CRS_DV_PORT, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, RMII_CRS_DV);
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/*
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/*
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* Configure GPIO Output function for LEDs
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* Configure GPIO Output function for LEDs
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*/
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*/
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