Modified configuration
This commit is contained in:
commit
4fb1bf9f11
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@ -38,7 +38,7 @@
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/* It is not sensible for this macro to have a default value as it is hardware
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* dependent. */
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#define ipconfigBYTE_ORDER pdFREERTOS_LITTLE_ENDIAN
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#define ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS 4
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//#define ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS 4
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#define ipconfigUSE_NETWORK_EVENT_HOOK 1
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#define ipconfigUSE_DHCP 1
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#define ipconfigUSE_DHCP_HOOK 1
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@ -46,6 +46,46 @@
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#define ipconfigMAC_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY )
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#define ipconfigDHCP_REGISTER_HOSTNAME 1
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#define ipconfigUSE_DNS 1
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#ifndef DEBUG
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#warning Define ipconfigWATCHDOG_TIMER()
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/* This macro will be called in every loop the IP-task makes. It may be
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* replaced by user-code that triggers a watchdog */
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#define ipconfigWATCHDOG_TIMER()
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#endif
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/* The option 'ipconfigUSE_CALLBACKS' allows to assign specific application
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* hooks to a socket. Each hook will be set with a specific socket option:
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*
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* FREERTOS_SO_TCP_CONN_HANDLER * Callback for (dis) connection events.
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* * Supply pointer to 'F_TCP_UDP_Handler_t'
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* FREERTOS_SO_TCP_RECV_HANDLER * Callback for receiving TCP data.
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* * Supply pointer to 'F_TCP_UDP_Handler_t'
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* FREERTOS_SO_TCP_SENT_HANDLER * Callback for sending TCP data.
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* * Supply pointer to 'F_TCP_UDP_Handler_t'
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* FREERTOS_SO_UDP_RECV_HANDLER * Callback for receiving UDP data.
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* * Supply pointer to 'F_TCP_UDP_Handler_t'
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* FREERTOS_SO_UDP_SENT_HANDLER * Callback for sending UDP data.
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* * Supply pointer to 'F_TCP_UDP_Handler_t'
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*
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* Note that the call-back functions will run in the IP-task, so very little
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* things can be done. Better not to call any networking API, because that
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* could easily lead to a deadlock situation.
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*/
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#define ipconfigUSE_CALLBACKS ( 0 )
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/* When non-zero, the buffers passed to xNetworkInterfaceOutput() will be passed
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* directly to DMA. As soon as sending is ready, the buffers must be released by
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* calling vReleaseNetworkBufferAndDescriptor(). */
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#define ipconfigZERO_COPY_TX_DRIVER ( 0 )
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/* When enabled, the network interface will pass the network buffers directly to
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* the DMA descriptors. When a packet has been received, the function
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* pxPacketBuffer_to_NetworkBuffer() will translate a buffer address to a
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* network packet, so it can be passed to the IP-task. */
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#define ipconfigZERO_COPY_RX_DRIVER ( 0 )
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//#define ipconfigUSE_LLMNR 1
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//#define ipconfigUSE_NBNS 1
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//#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES 1
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@ -3,16 +3,16 @@
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#include <stdio.h>
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#define iptraceNETWORK_DOWN() FreeRTOS_debug_printf(("[IPTRACE] Network down\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
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//#define iptraceNETWORK_DOWN() FreeRTOS_debug_printf(("[IPTRACE] Network down\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
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#define iptraceSENDING_DNS_REQUEST() FreeRTOS_debug_printf(("[IPTRACE] Sending DNS request\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
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#define iptraceSENDING_DHCP_DISCOVER() FreeRTOS_debug_printf(("[IPTRACE] Sending DHCP discover\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
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//#define iptraceSENDING_DHCP_DISCOVER() FreeRTOS_debug_printf(("[IPTRACE] Sending DHCP discover\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
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#define iptraceSENDING_DHCP_REQUEST() FreeRTOS_debug_printf(("[IPTRACE] Sending DHCP request\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
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//#define iptraceSENDING_DHCP_REQUEST() FreeRTOS_debug_printf(("[IPTRACE] Sending DHCP request\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
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#define iptraceETHERNET_RX_EVENT_LOST() FreeRTOS_debug_printf(("[IPTRACE] Ethernet rx event lost\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
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@ -28,6 +28,7 @@
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#ifndef NETWORK_INTERFACE_H
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#define NETWORK_INTERFACE_H
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#ifndef STM32_PORT
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//#include "FreeRTOS.h"
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//#include "FreeRTOSIPConfig.h"
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//#include "stdio.h"
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@ -41,301 +42,302 @@
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BaseType_t xNetworkInterfaceInitialise( void );
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BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxDescriptor,BaseType_t xReleaseAfterSend );
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#else /*STM32_PORT*/
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/* *INDENT-ON* */
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///**
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// * @brief HAL State structures definition
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// */
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// typedef enum
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// {
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// HAL_ETH_STATE_RESET = 0x00U, /*!< Peripheral not yet Initialized or disabled */
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// HAL_ETH_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
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// HAL_ETH_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
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// HAL_ETH_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
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// HAL_ETH_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
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// HAL_ETH_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */
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// HAL_ETH_STATE_BUSY_WR = 0x42U, /*!< Write process is ongoing */
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// HAL_ETH_STATE_BUSY_RD = 0x82U, /*!< Read process is ongoing */
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// HAL_ETH_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
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// HAL_ETH_STATE_ERROR = 0x04U /*!< Reception process is ongoing */
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// } HAL_ETH_StateTypeDef;
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//
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///**
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// * @brief ETH Init Structure definition
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// */
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/**
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* @brief HAL State structures definition
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*/
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typedef enum
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{
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HAL_ETH_STATE_RESET = 0x00U, /*!< Peripheral not yet Initialized or disabled */
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HAL_ETH_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
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HAL_ETH_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
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HAL_ETH_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
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HAL_ETH_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
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HAL_ETH_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */
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HAL_ETH_STATE_BUSY_WR = 0x42U, /*!< Write process is ongoing */
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HAL_ETH_STATE_BUSY_RD = 0x82U, /*!< Read process is ongoing */
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HAL_ETH_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
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HAL_ETH_STATE_ERROR = 0x04U /*!< Reception process is ongoing */
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} HAL_ETH_StateTypeDef;
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/**
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* @brief ETH Init Structure definition
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*/
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//typedef struct
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//{
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// uint32_t AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY
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// * The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps)
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// * and the mode (half/full-duplex).
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// * This parameter can be a value of @ref ETH_AutoNegotiation */
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typedef struct
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{
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uint32_t AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY
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* The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps)
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* and the mode (half/full-duplex).
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* This parameter can be a value of @ref ETH_AutoNegotiation */
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// uint32_t Speed; /*!< Sets the Ethernet speed: 10/100 Mbps.
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// * This parameter can be a value of @ref ETH_Speed */
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uint32_t Speed; /*!< Sets the Ethernet speed: 10/100 Mbps.
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* This parameter can be a value of @ref ETH_Speed */
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// uint32_t DuplexMode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode
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// * This parameter can be a value of @ref ETH_Duplex_Mode */
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uint32_t DuplexMode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode
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* This parameter can be a value of @ref ETH_Duplex_Mode */
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// uint16_t PhyAddress; /*!< Ethernet PHY address.
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// * This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
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uint16_t PhyAddress; /*!< Ethernet PHY address.
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* This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
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// uint8_t * MACAddr; /*!< MAC Address of used Hardware: must be pointer on an array of 6 bytes */
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uint8_t * MACAddr; /*!< MAC Address of used Hardware: must be pointer on an array of 6 bytes */
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// uint32_t RxMode; /*!< Selects the Ethernet Rx mode: Polling mode, Interrupt mode.
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// * This parameter can be a value of @ref ETH_Rx_Mode */
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uint32_t RxMode; /*!< Selects the Ethernet Rx mode: Polling mode, Interrupt mode.
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* This parameter can be a value of @ref ETH_Rx_Mode */
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// uint32_t ChecksumMode; /*!< Selects if the checksum is check by hardware or by software.
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// * This parameter can be a value of @ref ETH_Checksum_Mode */
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uint32_t ChecksumMode; /*!< Selects if the checksum is check by hardware or by software.
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* This parameter can be a value of @ref ETH_Checksum_Mode */
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// uint32_t MediaInterface; /*!< Selects the media-independent interface or the reduced media-independent interface.
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// * This parameter can be a value of @ref ETH_Media_Interface */
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//} ETH_InitTypeDef;
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uint32_t MediaInterface; /*!< Selects the media-independent interface or the reduced media-independent interface.
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* This parameter can be a value of @ref ETH_Media_Interface */
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} ETH_InitTypeDef;
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///**
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// * @brief ETH MAC Configuration Structure definition
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// */
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/**
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* @brief ETH MAC Configuration Structure definition
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*/
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//typedef struct
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//{
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// uint32_t Watchdog; /*!< Selects or not the Watchdog timer
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// * When enabled, the MAC allows no more then 2048 bytes to be received.
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// * When disabled, the MAC can receive up to 16384 bytes.
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// * This parameter can be a value of @ref ETH_Watchdog */
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typedef struct
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{
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uint32_t Watchdog; /*!< Selects or not the Watchdog timer
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* When enabled, the MAC allows no more then 2048 bytes to be received.
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* When disabled, the MAC can receive up to 16384 bytes.
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* This parameter can be a value of @ref ETH_Watchdog */
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// uint32_t Jabber; /*!< Selects or not Jabber timer
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// * When enabled, the MAC allows no more then 2048 bytes to be sent.
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// * When disabled, the MAC can send up to 16384 bytes.
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// * This parameter can be a value of @ref ETH_Jabber */
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uint32_t Jabber; /*!< Selects or not Jabber timer
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* When enabled, the MAC allows no more then 2048 bytes to be sent.
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* When disabled, the MAC can send up to 16384 bytes.
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* This parameter can be a value of @ref ETH_Jabber */
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// uint32_t InterFrameGap; /*!< Selects the minimum IFG between frames during transmission.
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// * This parameter can be a value of @ref ETH_Inter_Frame_Gap */
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uint32_t InterFrameGap; /*!< Selects the minimum IFG between frames during transmission.
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* This parameter can be a value of @ref ETH_Inter_Frame_Gap */
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// uint32_t CarrierSense; /*!< Selects or not the Carrier Sense.
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// * This parameter can be a value of @ref ETH_Carrier_Sense */
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uint32_t CarrierSense; /*!< Selects or not the Carrier Sense.
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* This parameter can be a value of @ref ETH_Carrier_Sense */
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// uint32_t ReceiveOwn; /*!< Selects or not the ReceiveOwn,
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// * ReceiveOwn allows the reception of frames when the TX_EN signal is asserted
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// * in Half-Duplex mode.
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// * This parameter can be a value of @ref ETH_Receive_Own */
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uint32_t ReceiveOwn; /*!< Selects or not the ReceiveOwn,
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* ReceiveOwn allows the reception of frames when the TX_EN signal is asserted
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* in Half-Duplex mode.
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* This parameter can be a value of @ref ETH_Receive_Own */
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// uint32_t LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode.
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// * This parameter can be a value of @ref ETH_Loop_Back_Mode */
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uint32_t LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode.
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* This parameter can be a value of @ref ETH_Loop_Back_Mode */
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// uint32_t ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers.
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// * This parameter can be a value of @ref ETH_Checksum_Offload */
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uint32_t ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers.
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* This parameter can be a value of @ref ETH_Checksum_Offload */
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// uint32_t RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL,
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// * when a collision occurs (Half-Duplex mode).
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// * This parameter can be a value of @ref ETH_Retry_Transmission */
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uint32_t RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL,
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* when a collision occurs (Half-Duplex mode).
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* This parameter can be a value of @ref ETH_Retry_Transmission */
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// uint32_t AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping.
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// * This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */
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uint32_t AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping.
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* This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */
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// uint32_t BackOffLimit; /*!< Selects the BackOff limit value.
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// * This parameter can be a value of @ref ETH_Back_Off_Limit */
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uint32_t BackOffLimit; /*!< Selects the BackOff limit value.
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* This parameter can be a value of @ref ETH_Back_Off_Limit */
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// uint32_t DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode).
|
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// * This parameter can be a value of @ref ETH_Deferral_Check */
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uint32_t DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode).
|
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* This parameter can be a value of @ref ETH_Deferral_Check */
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|
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// uint32_t ReceiveAll; /*!< Selects or not all frames reception by the MAC (No filtering).
|
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// * This parameter can be a value of @ref ETH_Receive_All */
|
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uint32_t ReceiveAll; /*!< Selects or not all frames reception by the MAC (No filtering).
|
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* This parameter can be a value of @ref ETH_Receive_All */
|
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|
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// uint32_t SourceAddrFilter; /*!< Selects the Source Address Filter mode.
|
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// * This parameter can be a value of @ref ETH_Source_Addr_Filter */
|
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uint32_t SourceAddrFilter; /*!< Selects the Source Address Filter mode.
|
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* This parameter can be a value of @ref ETH_Source_Addr_Filter */
|
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|
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// uint32_t PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames)
|
||||
// * This parameter can be a value of @ref ETH_Pass_Control_Frames */
|
||||
uint32_t PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames)
|
||||
* This parameter can be a value of @ref ETH_Pass_Control_Frames */
|
||||
|
||||
// uint32_t BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames.
|
||||
// * This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */
|
||||
uint32_t BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames.
|
||||
* This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */
|
||||
|
||||
// uint32_t DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames.
|
||||
// * This parameter can be a value of @ref ETH_Destination_Addr_Filter */
|
||||
uint32_t DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames.
|
||||
* This parameter can be a value of @ref ETH_Destination_Addr_Filter */
|
||||
|
||||
// uint32_t PromiscuousMode; /*!< Selects or not the Promiscuous Mode
|
||||
// * This parameter can be a value of @ref ETH_Promiscuous_Mode */
|
||||
uint32_t PromiscuousMode; /*!< Selects or not the Promiscuous Mode
|
||||
* This parameter can be a value of @ref ETH_Promiscuous_Mode */
|
||||
|
||||
// uint32_t MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter.
|
||||
// * This parameter can be a value of @ref ETH_Multicast_Frames_Filter */
|
||||
uint32_t MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter.
|
||||
* This parameter can be a value of @ref ETH_Multicast_Frames_Filter */
|
||||
|
||||
// uint32_t UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter.
|
||||
// * This parameter can be a value of @ref ETH_Unicast_Frames_Filter */
|
||||
uint32_t UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter.
|
||||
* This parameter can be a value of @ref ETH_Unicast_Frames_Filter */
|
||||
|
||||
// uint32_t HashTableHigh; /*!< This field holds the higher 32 bits of Hash table.
|
||||
// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
|
||||
uint32_t HashTableHigh; /*!< This field holds the higher 32 bits of Hash table.
|
||||
* This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
|
||||
|
||||
// uint32_t HashTableLow; /*!< This field holds the lower 32 bits of Hash table.
|
||||
// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
|
||||
uint32_t HashTableLow; /*!< This field holds the lower 32 bits of Hash table.
|
||||
* This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
|
||||
|
||||
// uint32_t PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame.
|
||||
// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFF */
|
||||
uint32_t PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame.
|
||||
* This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFF */
|
||||
|
||||
// uint32_t ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames.
|
||||
// * This parameter can be a value of @ref ETH_Zero_Quanta_Pause */
|
||||
uint32_t ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames.
|
||||
* This parameter can be a value of @ref ETH_Zero_Quanta_Pause */
|
||||
|
||||
// uint32_t PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for
|
||||
// * automatic retransmission of PAUSE Frame.
|
||||
// * This parameter can be a value of @ref ETH_Pause_Low_Threshold */
|
||||
uint32_t PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for
|
||||
* automatic retransmission of PAUSE Frame.
|
||||
* This parameter can be a value of @ref ETH_Pause_Low_Threshold */
|
||||
|
||||
// uint32_t UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0
|
||||
// * unicast address and unique multicast address).
|
||||
// * This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */
|
||||
uint32_t UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0
|
||||
* unicast address and unique multicast address).
|
||||
* This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */
|
||||
|
||||
// uint32_t ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and
|
||||
// * disable its transmitter for a specified time (Pause Time)
|
||||
// * This parameter can be a value of @ref ETH_Receive_Flow_Control */
|
||||
uint32_t ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and
|
||||
* disable its transmitter for a specified time (Pause Time)
|
||||
* This parameter can be a value of @ref ETH_Receive_Flow_Control */
|
||||
|
||||
// uint32_t TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode)
|
||||
// * or the MAC back-pressure operation (Half-Duplex mode)
|
||||
// * This parameter can be a value of @ref ETH_Transmit_Flow_Control */
|
||||
uint32_t TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode)
|
||||
* or the MAC back-pressure operation (Half-Duplex mode)
|
||||
* This parameter can be a value of @ref ETH_Transmit_Flow_Control */
|
||||
|
||||
// uint32_t VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for
|
||||
// * comparison and filtering.
|
||||
// * This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */
|
||||
uint32_t VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for
|
||||
* comparison and filtering.
|
||||
* This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */
|
||||
|
||||
// uint32_t VLANTagIdentifier; /*!< Holds the VLAN tag identifier for receive frames */
|
||||
//} ETH_MACInitTypeDef;
|
||||
uint32_t VLANTagIdentifier; /*!< Holds the VLAN tag identifier for receive frames */
|
||||
} ETH_MACInitTypeDef;
|
||||
|
||||
|
||||
///**
|
||||
// * @brief ETH DMA Configuration Structure definition
|
||||
// */
|
||||
/**
|
||||
* @brief ETH DMA Configuration Structure definition
|
||||
*/
|
||||
|
||||
//typedef struct
|
||||
//{
|
||||
// uint32_t DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames.
|
||||
// * This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */
|
||||
typedef struct
|
||||
{
|
||||
uint32_t DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames.
|
||||
* This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */
|
||||
|
||||
// uint32_t ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode.
|
||||
// * This parameter can be a value of @ref ETH_Receive_Store_Forward */
|
||||
uint32_t ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode.
|
||||
* This parameter can be a value of @ref ETH_Receive_Store_Forward */
|
||||
|
||||
// uint32_t FlushReceivedFrame; /*!< Enables or disables the flushing of received frames.
|
||||
// * This parameter can be a value of @ref ETH_Flush_Received_Frame */
|
||||
uint32_t FlushReceivedFrame; /*!< Enables or disables the flushing of received frames.
|
||||
* This parameter can be a value of @ref ETH_Flush_Received_Frame */
|
||||
|
||||
// uint32_t TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode.
|
||||
// * This parameter can be a value of @ref ETH_Transmit_Store_Forward */
|
||||
uint32_t TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode.
|
||||
* This parameter can be a value of @ref ETH_Transmit_Store_Forward */
|
||||
|
||||
// uint32_t TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control.
|
||||
// * This parameter can be a value of @ref ETH_Transmit_Threshold_Control */
|
||||
uint32_t TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control.
|
||||
* This parameter can be a value of @ref ETH_Transmit_Threshold_Control */
|
||||
|
||||
// uint32_t ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames.
|
||||
// * This parameter can be a value of @ref ETH_Forward_Error_Frames */
|
||||
uint32_t ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames.
|
||||
* This parameter can be a value of @ref ETH_Forward_Error_Frames */
|
||||
|
||||
// uint32_t ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error
|
||||
// * and length less than 64 bytes) including pad-bytes and CRC)
|
||||
// * This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */
|
||||
uint32_t ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error
|
||||
* and length less than 64 bytes) including pad-bytes and CRC)
|
||||
* This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */
|
||||
|
||||
// uint32_t ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO.
|
||||
// * This parameter can be a value of @ref ETH_Receive_Threshold_Control */
|
||||
uint32_t ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO.
|
||||
* This parameter can be a value of @ref ETH_Receive_Threshold_Control */
|
||||
|
||||
// uint32_t SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second
|
||||
// * frame of Transmit data even before obtaining the status for the first frame.
|
||||
// * This parameter can be a value of @ref ETH_Second_Frame_Operate */
|
||||
uint32_t SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second
|
||||
* frame of Transmit data even before obtaining the status for the first frame.
|
||||
* This parameter can be a value of @ref ETH_Second_Frame_Operate */
|
||||
|
||||
// uint32_t AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats.
|
||||
// * This parameter can be a value of @ref ETH_Address_Aligned_Beats */
|
||||
uint32_t AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats.
|
||||
* This parameter can be a value of @ref ETH_Address_Aligned_Beats */
|
||||
|
||||
// uint32_t FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers.
|
||||
// * This parameter can be a value of @ref ETH_Fixed_Burst */
|
||||
uint32_t FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers.
|
||||
* This parameter can be a value of @ref ETH_Fixed_Burst */
|
||||
|
||||
// uint32_t RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction.
|
||||
// * This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */
|
||||
uint32_t RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction.
|
||||
* This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */
|
||||
|
||||
// uint32_t TxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Tx DMA transaction.
|
||||
// * This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */
|
||||
uint32_t TxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Tx DMA transaction.
|
||||
* This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */
|
||||
|
||||
// uint32_t EnhancedDescriptorFormat; /*!< Enables the enhanced descriptor format.
|
||||
// * This parameter can be a value of @ref ETH_DMA_Enhanced_descriptor_format */
|
||||
uint32_t EnhancedDescriptorFormat; /*!< Enables the enhanced descriptor format.
|
||||
* This parameter can be a value of @ref ETH_DMA_Enhanced_descriptor_format */
|
||||
|
||||
// uint32_t DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode)
|
||||
// * This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
|
||||
uint32_t DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode)
|
||||
* This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
|
||||
|
||||
// uint32_t DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration.
|
||||
// * This parameter can be a value of @ref ETH_DMA_Arbitration */
|
||||
//} ETH_DMAInitTypeDef;
|
||||
uint32_t DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration.
|
||||
* This parameter can be a value of @ref ETH_DMA_Arbitration */
|
||||
} ETH_DMAInitTypeDef;
|
||||
|
||||
|
||||
///**
|
||||
// * @brief ETH DMA Descriptors data structure definition
|
||||
// */
|
||||
/**
|
||||
* @brief ETH DMA Descriptors data structure definition
|
||||
*/
|
||||
|
||||
//typedef struct
|
||||
//{
|
||||
// volatile uint32_t Status; /*!< Status */
|
||||
typedef struct
|
||||
{
|
||||
volatile uint32_t Status; /*!< Status */
|
||||
|
||||
// uint32_t ControlBufferSize; /*!< Control and Buffer1, Buffer2 lengths */
|
||||
uint32_t ControlBufferSize; /*!< Control and Buffer1, Buffer2 lengths */
|
||||
|
||||
// uint32_t Buffer1Addr; /*!< Buffer1 address pointer */
|
||||
uint32_t Buffer1Addr; /*!< Buffer1 address pointer */
|
||||
|
||||
// uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */
|
||||
uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */
|
||||
|
||||
// /*!< Enhanced Ethernet DMA PTP Descriptors */
|
||||
// uint32_t ExtendedStatus; /*!< Extended status for PTP receive descriptor */
|
||||
/*!< Enhanced Ethernet DMA PTP Descriptors */
|
||||
uint32_t ExtendedStatus; /*!< Extended status for PTP receive descriptor */
|
||||
|
||||
// uint32_t Reserved1; /*!< Reserved */
|
||||
uint32_t Reserved1; /*!< Reserved */
|
||||
|
||||
// uint32_t TimeStampLow; /*!< Time Stamp Low value for transmit and receive */
|
||||
uint32_t TimeStampLow; /*!< Time Stamp Low value for transmit and receive */
|
||||
|
||||
// uint32_t TimeStampHigh; /*!< Time Stamp High value for transmit and receive */
|
||||
//} ETH_DMADescTypeDef;
|
||||
uint32_t TimeStampHigh; /*!< Time Stamp High value for transmit and receive */
|
||||
} ETH_DMADescTypeDef;
|
||||
|
||||
|
||||
///**
|
||||
// * @brief Received Frame Informations structure definition
|
||||
// */
|
||||
//typedef struct
|
||||
//{
|
||||
// ETH_DMADescTypeDef * FSRxDesc; /*!< First Segment Rx Desc */
|
||||
/**
|
||||
* @brief Received Frame Informations structure definition
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
ETH_DMADescTypeDef * FSRxDesc; /*!< First Segment Rx Desc */
|
||||
|
||||
// ETH_DMADescTypeDef * LSRxDesc; /*!< Last Segment Rx Desc */
|
||||
ETH_DMADescTypeDef * LSRxDesc; /*!< Last Segment Rx Desc */
|
||||
|
||||
// uint32_t SegCount; /*!< Segment count */
|
||||
uint32_t SegCount; /*!< Segment count */
|
||||
|
||||
// uint32_t length; /*!< Frame length */
|
||||
uint32_t length; /*!< Frame length */
|
||||
|
||||
// uint32_t buffer; /*!< Frame buffer */
|
||||
//} ETH_DMARxFrameInfos;
|
||||
uint32_t buffer; /*!< Frame buffer */
|
||||
} ETH_DMARxFrameInfos;
|
||||
|
||||
//#define ETH_TypeDef void
|
||||
///**
|
||||
// * @brief ETH Handle Structure definition
|
||||
// */
|
||||
#define ETH_TypeDef void
|
||||
/**
|
||||
* @brief ETH Handle Structure definition
|
||||
*/
|
||||
|
||||
//typedef struct
|
||||
//{
|
||||
// ETH_TypeDef * Instance; /*!< Register base address */
|
||||
typedef struct
|
||||
{
|
||||
ETH_TypeDef * Instance; /*!< Register base address */
|
||||
|
||||
// ETH_InitTypeDef Init; /*!< Ethernet Init Configuration */
|
||||
ETH_InitTypeDef Init; /*!< Ethernet Init Configuration */
|
||||
|
||||
// uint32_t LinkStatus; /*!< Ethernet link status */
|
||||
uint32_t LinkStatus; /*!< Ethernet link status */
|
||||
|
||||
// ETH_DMADescTypeDef * RxDesc; /*!< Rx descriptor to Get */
|
||||
ETH_DMADescTypeDef * RxDesc; /*!< Rx descriptor to Get */
|
||||
|
||||
// ETH_DMADescTypeDef * TxDesc; /*!< Tx descriptor to Set */
|
||||
ETH_DMADescTypeDef * TxDesc; /*!< Tx descriptor to Set */
|
||||
|
||||
// ETH_DMARxFrameInfos RxFrameInfos; /*!< last Rx frame infos */
|
||||
ETH_DMARxFrameInfos RxFrameInfos; /*!< last Rx frame infos */
|
||||
|
||||
// volatile HAL_ETH_StateTypeDef State; /*!< ETH communication state */
|
||||
volatile HAL_ETH_StateTypeDef State; /*!< ETH communication state */
|
||||
|
||||
// HAL_LockTypeDef Lock; /*!< ETH Lock */
|
||||
//} ETH_HandleTypeDef;
|
||||
///* INTERNAL API FUNCTIONS. */
|
||||
//BaseType_t xNetworkInterfaceInitialise( void );
|
||||
//BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxNetworkBuffer,
|
||||
// BaseType_t xReleaseAfterSend );
|
||||
HAL_LockTypeDef Lock; /*!< ETH Lock */
|
||||
} ETH_HandleTypeDef;
|
||||
/* INTERNAL API FUNCTIONS. */
|
||||
BaseType_t xNetworkInterfaceInitialise( void );
|
||||
BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxNetworkBuffer,
|
||||
BaseType_t xReleaseAfterSend );
|
||||
|
||||
///* The following function is defined only when BufferAllocation_1.c is linked in the project. */
|
||||
//void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] );
|
||||
/* The following function is defined only when BufferAllocation_1.c is linked in the project. */
|
||||
void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] );
|
||||
|
||||
///* The following function is defined only when BufferAllocation_1.c is linked in the project. */
|
||||
//BaseType_t xGetPhyLinkStatus( void );
|
||||
|
||||
///* *INDENT-OFF* */
|
||||
//#ifdef __cplusplus
|
||||
// } /* extern "C" */
|
||||
//#endif
|
||||
///* *INDENT-ON* */
|
||||
/* The following function is defined only when BufferAllocation_1.c is linked in the project. */
|
||||
BaseType_t xGetPhyLinkStatus( void );
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
} /* extern "C" */
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
#endif /*STM32_PORT*/
|
||||
#endif /* NETWORK_INTERFACE_H */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -64,7 +64,11 @@ extern uint32_t SystemCoreClock;
|
|||
#define configUSE_16_BIT_TICKS 0
|
||||
|
||||
/* Software timer definitions. */
|
||||
#ifdef CENTRALISED_DEFERRED_IRQ_HADLING
|
||||
#define configUSE_TIMERS 0
|
||||
#else
|
||||
#define configUSE_TIMERS 1
|
||||
#endif
|
||||
#define configTIMER_TASK_PRIORITY 2
|
||||
#define configTIMER_QUEUE_LENGTH 5
|
||||
#define configTIMER_TASK_STACK_DEPTH (configMINIMAL_STACK_SIZE * 2)
|
||||
|
|
@ -146,7 +150,11 @@ extern uint32_t SystemCoreClock;
|
|||
#define INCLUDE_uxTaskGetStackHighWaterMark2 1
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define INCLUDE_xTaskResumeFromISR 1
|
||||
#ifdef CENTRALISED_DEFERRED_IRQ_HADLING
|
||||
#define INCLUDE_xTimerPendFunctionCall 0
|
||||
#else
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
#endif
|
||||
#define INCLUDE_xTaskGetSchedulerState 1
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
|
||||
|
|
|
|||
2
main.c
2
main.c
|
|
@ -277,7 +277,7 @@ static void vInitMCU(void)
|
|||
|
||||
/* Enable Ethernet MAC */
|
||||
enet_descriptors_chain_init(ENET_DMA_TX);
|
||||
enet_descriptors_chain_init(ENET_DMA_RX); //enet_desc_receive_complete_bit_enable(dma_current_rxdesc);
|
||||
enet_descriptors_chain_init(ENET_DMA_RX);
|
||||
enet_enable();
|
||||
//nvic_irq_enable(ENET_IRQn, ipconfigMAC_INTERRUPT_PRIORITY, 0xFF);
|
||||
__disable_irq();
|
||||
|
|
|
|||
Loading…
Reference in New Issue