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Added zero copy receiveHandlerTask 

Added CENTRALISED_DEFERRED_IRQ_HADLING option
This commit is contained in:
Alexei 2023-04-10 08:33:34 +07:00
parent ae004dd01c
commit 335d3e9be5
10 changed files with 1884 additions and 1728 deletions
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4
DemoTasks/SimpleTCPEchoServer.c
View File

@ -159,7 +159,7 @@ struct freertos_sockaddr xClient, xBindAddress;
Socket_t xListeningSocket, xConnectedSocket;
socklen_t xSize = sizeof( xClient );
static const TickType_t xReceiveTimeOut = portMAX_DELAY;
const BaseType_t xBacklog = 20;
const BaseType_t xBacklog = 1;
#if( ipconfigUSE_TCP_WIN == 1 )
@ -256,7 +256,7 @@ uint8_t *pucRxBuffer;
lBytes = FreeRTOS_recv( xConnectedSocket, pucRxBuffer, ipconfigTCP_MSS, 0 );
/* If data was received, echo it back. */
if( lBytes >= 0 )
if( lBytes > 0 )
{
RF_OUT_ENUM state = -1;
int8_t enable = -1;

42
FreeRTOS/source/include/FreeRTOSIPConfig.h
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@ -38,7 +38,7 @@
/* It is not sensible for this macro to have a default value as it is hardware
* dependent. */
#define ipconfigBYTE_ORDER pdFREERTOS_LITTLE_ENDIAN
#define ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS 4
//#define ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS 4
#define ipconfigUSE_NETWORK_EVENT_HOOK 1
#define ipconfigUSE_DHCP 1
#define ipconfigUSE_DHCP_HOOK 1
@ -46,6 +46,46 @@
#define ipconfigMAC_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY )
#define ipconfigDHCP_REGISTER_HOSTNAME 1
#define ipconfigUSE_DNS 1
#ifndef DEBUG
#warning Define ipconfigWATCHDOG_TIMER()
/* This macro will be called in every loop the IP-task makes. It may be
* replaced by user-code that triggers a watchdog */
#define ipconfigWATCHDOG_TIMER()
#endif
/* The option 'ipconfigUSE_CALLBACKS' allows to assign specific application
* hooks to a socket. Each hook will be set with a specific socket option:
*
* FREERTOS_SO_TCP_CONN_HANDLER * Callback for (dis) connection events.
* * Supply pointer to 'F_TCP_UDP_Handler_t'
* FREERTOS_SO_TCP_RECV_HANDLER * Callback for receiving TCP data.
* * Supply pointer to 'F_TCP_UDP_Handler_t'
* FREERTOS_SO_TCP_SENT_HANDLER * Callback for sending TCP data.
* * Supply pointer to 'F_TCP_UDP_Handler_t'
* FREERTOS_SO_UDP_RECV_HANDLER * Callback for receiving UDP data.
* * Supply pointer to 'F_TCP_UDP_Handler_t'
* FREERTOS_SO_UDP_SENT_HANDLER * Callback for sending UDP data.
* * Supply pointer to 'F_TCP_UDP_Handler_t'
*
* Note that the call-back functions will run in the IP-task, so very little
* things can be done. Better not to call any networking API, because that
* could easily lead to a deadlock situation.
*/
#define ipconfigUSE_CALLBACKS ( 0 )
/* When non-zero, the buffers passed to xNetworkInterfaceOutput() will be passed
* directly to DMA. As soon as sending is ready, the buffers must be released by
* calling vReleaseNetworkBufferAndDescriptor(). */
#define ipconfigZERO_COPY_TX_DRIVER ( 0 )
/* When enabled, the network interface will pass the network buffers directly to
* the DMA descriptors. When a packet has been received, the function
* pxPacketBuffer_to_NetworkBuffer() will translate a buffer address to a
* network packet, so it can be passed to the IP-task. */
#define ipconfigZERO_COPY_RX_DRIVER ( 1 )
//#define ipconfigUSE_LLMNR 1
//#define ipconfigUSE_NBNS 1
//#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES 1

6
FreeRTOS/source/include/IPTraceMacro.h
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@ -3,16 +3,16 @@
#include <stdio.h>
#define iptraceNETWORK_DOWN() FreeRTOS_debug_printf(("[IPTRACE] Network down\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
//#define iptraceNETWORK_DOWN() FreeRTOS_debug_printf(("[IPTRACE] Network down\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
#define iptraceSENDING_DNS_REQUEST() FreeRTOS_debug_printf(("[IPTRACE] Sending DNS request\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
#define iptraceSENDING_DHCP_DISCOVER() FreeRTOS_debug_printf(("[IPTRACE] Sending DHCP discover\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
//#define iptraceSENDING_DHCP_DISCOVER() FreeRTOS_debug_printf(("[IPTRACE] Sending DHCP discover\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
#define iptraceSENDING_DHCP_REQUEST() FreeRTOS_debug_printf(("[IPTRACE] Sending DHCP request\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
//#define iptraceSENDING_DHCP_REQUEST() FreeRTOS_debug_printf(("[IPTRACE] Sending DHCP request\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));
#define iptraceETHERNET_RX_EVENT_LOST() FreeRTOS_debug_printf(("[IPTRACE] Ethernet rx event lost\nFreeHeapSize = %d\n", xPortGetFreeHeapSize()));

422
FreeRTOS/source/include/NetworkInterface.h
View File

@ -28,6 +28,7 @@
#ifndef NETWORK_INTERFACE_H
#define NETWORK_INTERFACE_H
#ifndef STM32_PORT
//#include "FreeRTOS.h"
//#include "FreeRTOSIPConfig.h"
//#include "stdio.h"
@ -41,301 +42,302 @@
BaseType_t xNetworkInterfaceInitialise( void );
BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxDescriptor,BaseType_t xReleaseAfterSend );
#else /*STM32_PORT*/
/* *INDENT-ON* */
///**
// * @brief HAL State structures definition
// */
// typedef enum
// {
// HAL_ETH_STATE_RESET = 0x00U, /*!< Peripheral not yet Initialized or disabled */
// HAL_ETH_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
// HAL_ETH_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
// HAL_ETH_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
// HAL_ETH_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
// HAL_ETH_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */
// HAL_ETH_STATE_BUSY_WR = 0x42U, /*!< Write process is ongoing */
// HAL_ETH_STATE_BUSY_RD = 0x82U, /*!< Read process is ongoing */
// HAL_ETH_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
// HAL_ETH_STATE_ERROR = 0x04U /*!< Reception process is ongoing */
// } HAL_ETH_StateTypeDef;
//
///**
// * @brief ETH Init Structure definition
// */
/**
* @brief HAL State structures definition
*/
typedef enum
{
HAL_ETH_STATE_RESET = 0x00U, /*!< Peripheral not yet Initialized or disabled */
HAL_ETH_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
HAL_ETH_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
HAL_ETH_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
HAL_ETH_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
HAL_ETH_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */
HAL_ETH_STATE_BUSY_WR = 0x42U, /*!< Write process is ongoing */
HAL_ETH_STATE_BUSY_RD = 0x82U, /*!< Read process is ongoing */
HAL_ETH_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
HAL_ETH_STATE_ERROR = 0x04U /*!< Reception process is ongoing */
} HAL_ETH_StateTypeDef;
/**
* @brief ETH Init Structure definition
*/
//typedef struct
//{
// uint32_t AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY
// * The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps)
// * and the mode (half/full-duplex).
// * This parameter can be a value of @ref ETH_AutoNegotiation */
typedef struct
{
uint32_t AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY
* The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps)
* and the mode (half/full-duplex).
* This parameter can be a value of @ref ETH_AutoNegotiation */
// uint32_t Speed; /*!< Sets the Ethernet speed: 10/100 Mbps.
// * This parameter can be a value of @ref ETH_Speed */
uint32_t Speed; /*!< Sets the Ethernet speed: 10/100 Mbps.
* This parameter can be a value of @ref ETH_Speed */
// uint32_t DuplexMode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode
// * This parameter can be a value of @ref ETH_Duplex_Mode */
uint32_t DuplexMode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode
* This parameter can be a value of @ref ETH_Duplex_Mode */
// uint16_t PhyAddress; /*!< Ethernet PHY address.
// * This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
uint16_t PhyAddress; /*!< Ethernet PHY address.
* This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
// uint8_t * MACAddr; /*!< MAC Address of used Hardware: must be pointer on an array of 6 bytes */
uint8_t * MACAddr; /*!< MAC Address of used Hardware: must be pointer on an array of 6 bytes */
// uint32_t RxMode; /*!< Selects the Ethernet Rx mode: Polling mode, Interrupt mode.
// * This parameter can be a value of @ref ETH_Rx_Mode */
uint32_t RxMode; /*!< Selects the Ethernet Rx mode: Polling mode, Interrupt mode.
* This parameter can be a value of @ref ETH_Rx_Mode */
// uint32_t ChecksumMode; /*!< Selects if the checksum is check by hardware or by software.
// * This parameter can be a value of @ref ETH_Checksum_Mode */
uint32_t ChecksumMode; /*!< Selects if the checksum is check by hardware or by software.
* This parameter can be a value of @ref ETH_Checksum_Mode */
// uint32_t MediaInterface; /*!< Selects the media-independent interface or the reduced media-independent interface.
// * This parameter can be a value of @ref ETH_Media_Interface */
//} ETH_InitTypeDef;
uint32_t MediaInterface; /*!< Selects the media-independent interface or the reduced media-independent interface.
* This parameter can be a value of @ref ETH_Media_Interface */
} ETH_InitTypeDef;
///**
// * @brief ETH MAC Configuration Structure definition
// */
/**
* @brief ETH MAC Configuration Structure definition
*/
//typedef struct
//{
// uint32_t Watchdog; /*!< Selects or not the Watchdog timer
// * When enabled, the MAC allows no more then 2048 bytes to be received.
// * When disabled, the MAC can receive up to 16384 bytes.
// * This parameter can be a value of @ref ETH_Watchdog */
typedef struct
{
uint32_t Watchdog; /*!< Selects or not the Watchdog timer
* When enabled, the MAC allows no more then 2048 bytes to be received.
* When disabled, the MAC can receive up to 16384 bytes.
* This parameter can be a value of @ref ETH_Watchdog */
// uint32_t Jabber; /*!< Selects or not Jabber timer
// * When enabled, the MAC allows no more then 2048 bytes to be sent.
// * When disabled, the MAC can send up to 16384 bytes.
// * This parameter can be a value of @ref ETH_Jabber */
uint32_t Jabber; /*!< Selects or not Jabber timer
* When enabled, the MAC allows no more then 2048 bytes to be sent.
* When disabled, the MAC can send up to 16384 bytes.
* This parameter can be a value of @ref ETH_Jabber */
// uint32_t InterFrameGap; /*!< Selects the minimum IFG between frames during transmission.
// * This parameter can be a value of @ref ETH_Inter_Frame_Gap */
uint32_t InterFrameGap; /*!< Selects the minimum IFG between frames during transmission.
* This parameter can be a value of @ref ETH_Inter_Frame_Gap */
// uint32_t CarrierSense; /*!< Selects or not the Carrier Sense.
// * This parameter can be a value of @ref ETH_Carrier_Sense */
uint32_t CarrierSense; /*!< Selects or not the Carrier Sense.
* This parameter can be a value of @ref ETH_Carrier_Sense */
// uint32_t ReceiveOwn; /*!< Selects or not the ReceiveOwn,
// * ReceiveOwn allows the reception of frames when the TX_EN signal is asserted
// * in Half-Duplex mode.
// * This parameter can be a value of @ref ETH_Receive_Own */
uint32_t ReceiveOwn; /*!< Selects or not the ReceiveOwn,
* ReceiveOwn allows the reception of frames when the TX_EN signal is asserted
* in Half-Duplex mode.
* This parameter can be a value of @ref ETH_Receive_Own */
// uint32_t LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode.
// * This parameter can be a value of @ref ETH_Loop_Back_Mode */
uint32_t LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode.
* This parameter can be a value of @ref ETH_Loop_Back_Mode */
// uint32_t ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers.
// * This parameter can be a value of @ref ETH_Checksum_Offload */
uint32_t ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers.
* This parameter can be a value of @ref ETH_Checksum_Offload */
// uint32_t RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL,
// * when a collision occurs (Half-Duplex mode).
// * This parameter can be a value of @ref ETH_Retry_Transmission */
uint32_t RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL,
* when a collision occurs (Half-Duplex mode).
* This parameter can be a value of @ref ETH_Retry_Transmission */
// uint32_t AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping.
// * This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */
uint32_t AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping.
* This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */
// uint32_t BackOffLimit; /*!< Selects the BackOff limit value.
// * This parameter can be a value of @ref ETH_Back_Off_Limit */
uint32_t BackOffLimit; /*!< Selects the BackOff limit value.
* This parameter can be a value of @ref ETH_Back_Off_Limit */
// uint32_t DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode).
// * This parameter can be a value of @ref ETH_Deferral_Check */
uint32_t DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode).
* This parameter can be a value of @ref ETH_Deferral_Check */
// uint32_t ReceiveAll; /*!< Selects or not all frames reception by the MAC (No filtering).
// * This parameter can be a value of @ref ETH_Receive_All */
uint32_t ReceiveAll; /*!< Selects or not all frames reception by the MAC (No filtering).
* This parameter can be a value of @ref ETH_Receive_All */
// uint32_t SourceAddrFilter; /*!< Selects the Source Address Filter mode.
// * This parameter can be a value of @ref ETH_Source_Addr_Filter */
uint32_t SourceAddrFilter; /*!< Selects the Source Address Filter mode.
* This parameter can be a value of @ref ETH_Source_Addr_Filter */
// uint32_t PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames)
// * This parameter can be a value of @ref ETH_Pass_Control_Frames */
uint32_t PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames)
* This parameter can be a value of @ref ETH_Pass_Control_Frames */
// uint32_t BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames.
// * This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */
uint32_t BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames.
* This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */
// uint32_t DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames.
// * This parameter can be a value of @ref ETH_Destination_Addr_Filter */
uint32_t DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames.
* This parameter can be a value of @ref ETH_Destination_Addr_Filter */
// uint32_t PromiscuousMode; /*!< Selects or not the Promiscuous Mode
// * This parameter can be a value of @ref ETH_Promiscuous_Mode */
uint32_t PromiscuousMode; /*!< Selects or not the Promiscuous Mode
* This parameter can be a value of @ref ETH_Promiscuous_Mode */
// uint32_t MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter.
// * This parameter can be a value of @ref ETH_Multicast_Frames_Filter */
uint32_t MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter.
* This parameter can be a value of @ref ETH_Multicast_Frames_Filter */
// uint32_t UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter.
// * This parameter can be a value of @ref ETH_Unicast_Frames_Filter */
uint32_t UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter.
* This parameter can be a value of @ref ETH_Unicast_Frames_Filter */
// uint32_t HashTableHigh; /*!< This field holds the higher 32 bits of Hash table.
// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
uint32_t HashTableHigh; /*!< This field holds the higher 32 bits of Hash table.
* This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
// uint32_t HashTableLow; /*!< This field holds the lower 32 bits of Hash table.
// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
uint32_t HashTableLow; /*!< This field holds the lower 32 bits of Hash table.
* This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
// uint32_t PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame.
// * This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFF */
uint32_t PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame.
* This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFF */
// uint32_t ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames.
// * This parameter can be a value of @ref ETH_Zero_Quanta_Pause */
uint32_t ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames.
* This parameter can be a value of @ref ETH_Zero_Quanta_Pause */
// uint32_t PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for
// * automatic retransmission of PAUSE Frame.
// * This parameter can be a value of @ref ETH_Pause_Low_Threshold */
uint32_t PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for
* automatic retransmission of PAUSE Frame.
* This parameter can be a value of @ref ETH_Pause_Low_Threshold */
// uint32_t UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0
// * unicast address and unique multicast address).
// * This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */
uint32_t UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0
* unicast address and unique multicast address).
* This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */
// uint32_t ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and
// * disable its transmitter for a specified time (Pause Time)
// * This parameter can be a value of @ref ETH_Receive_Flow_Control */
uint32_t ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and
* disable its transmitter for a specified time (Pause Time)
* This parameter can be a value of @ref ETH_Receive_Flow_Control */
// uint32_t TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode)
// * or the MAC back-pressure operation (Half-Duplex mode)
// * This parameter can be a value of @ref ETH_Transmit_Flow_Control */
uint32_t TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode)
* or the MAC back-pressure operation (Half-Duplex mode)
* This parameter can be a value of @ref ETH_Transmit_Flow_Control */
// uint32_t VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for
// * comparison and filtering.
// * This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */
uint32_t VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for
* comparison and filtering.
* This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */
// uint32_t VLANTagIdentifier; /*!< Holds the VLAN tag identifier for receive frames */
//} ETH_MACInitTypeDef;
uint32_t VLANTagIdentifier; /*!< Holds the VLAN tag identifier for receive frames */
} ETH_MACInitTypeDef;
///**
// * @brief ETH DMA Configuration Structure definition
// */
/**
* @brief ETH DMA Configuration Structure definition
*/
//typedef struct
//{
// uint32_t DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames.
// * This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */
typedef struct
{
uint32_t DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames.
* This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */
// uint32_t ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode.
// * This parameter can be a value of @ref ETH_Receive_Store_Forward */
uint32_t ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode.
* This parameter can be a value of @ref ETH_Receive_Store_Forward */
// uint32_t FlushReceivedFrame; /*!< Enables or disables the flushing of received frames.
// * This parameter can be a value of @ref ETH_Flush_Received_Frame */
uint32_t FlushReceivedFrame; /*!< Enables or disables the flushing of received frames.
* This parameter can be a value of @ref ETH_Flush_Received_Frame */
// uint32_t TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode.
// * This parameter can be a value of @ref ETH_Transmit_Store_Forward */
uint32_t TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode.
* This parameter can be a value of @ref ETH_Transmit_Store_Forward */
// uint32_t TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control.
// * This parameter can be a value of @ref ETH_Transmit_Threshold_Control */
uint32_t TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control.
* This parameter can be a value of @ref ETH_Transmit_Threshold_Control */
// uint32_t ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames.
// * This parameter can be a value of @ref ETH_Forward_Error_Frames */
uint32_t ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames.
* This parameter can be a value of @ref ETH_Forward_Error_Frames */
// uint32_t ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error
// * and length less than 64 bytes) including pad-bytes and CRC)
// * This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */
uint32_t ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error
* and length less than 64 bytes) including pad-bytes and CRC)
* This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */
// uint32_t ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO.
// * This parameter can be a value of @ref ETH_Receive_Threshold_Control */
uint32_t ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO.
* This parameter can be a value of @ref ETH_Receive_Threshold_Control */
// uint32_t SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second
// * frame of Transmit data even before obtaining the status for the first frame.
// * This parameter can be a value of @ref ETH_Second_Frame_Operate */
uint32_t SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second
* frame of Transmit data even before obtaining the status for the first frame.
* This parameter can be a value of @ref ETH_Second_Frame_Operate */
// uint32_t AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats.
// * This parameter can be a value of @ref ETH_Address_Aligned_Beats */
uint32_t AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats.
* This parameter can be a value of @ref ETH_Address_Aligned_Beats */
// uint32_t FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers.
// * This parameter can be a value of @ref ETH_Fixed_Burst */
uint32_t FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers.
* This parameter can be a value of @ref ETH_Fixed_Burst */
// uint32_t RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction.
// * This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */
uint32_t RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction.
* This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */
// uint32_t TxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Tx DMA transaction.
// * This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */
uint32_t TxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Tx DMA transaction.
* This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */
// uint32_t EnhancedDescriptorFormat; /*!< Enables the enhanced descriptor format.
// * This parameter can be a value of @ref ETH_DMA_Enhanced_descriptor_format */
uint32_t EnhancedDescriptorFormat; /*!< Enables the enhanced descriptor format.
* This parameter can be a value of @ref ETH_DMA_Enhanced_descriptor_format */
// uint32_t DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode)
// * This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
uint32_t DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode)
* This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
// uint32_t DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration.
// * This parameter can be a value of @ref ETH_DMA_Arbitration */
//} ETH_DMAInitTypeDef;
uint32_t DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration.
* This parameter can be a value of @ref ETH_DMA_Arbitration */
} ETH_DMAInitTypeDef;
///**
// * @brief ETH DMA Descriptors data structure definition
// */
/**
* @brief ETH DMA Descriptors data structure definition
*/
//typedef struct
//{
// volatile uint32_t Status; /*!< Status */
typedef struct
{
volatile uint32_t Status; /*!< Status */
// uint32_t ControlBufferSize; /*!< Control and Buffer1, Buffer2 lengths */
uint32_t ControlBufferSize; /*!< Control and Buffer1, Buffer2 lengths */
// uint32_t Buffer1Addr; /*!< Buffer1 address pointer */
uint32_t Buffer1Addr; /*!< Buffer1 address pointer */
// uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */
uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */
// /*!< Enhanced Ethernet DMA PTP Descriptors */
// uint32_t ExtendedStatus; /*!< Extended status for PTP receive descriptor */
/*!< Enhanced Ethernet DMA PTP Descriptors */
uint32_t ExtendedStatus; /*!< Extended status for PTP receive descriptor */
// uint32_t Reserved1; /*!< Reserved */
uint32_t Reserved1; /*!< Reserved */
// uint32_t TimeStampLow; /*!< Time Stamp Low value for transmit and receive */
uint32_t TimeStampLow; /*!< Time Stamp Low value for transmit and receive */
// uint32_t TimeStampHigh; /*!< Time Stamp High value for transmit and receive */
//} ETH_DMADescTypeDef;
uint32_t TimeStampHigh; /*!< Time Stamp High value for transmit and receive */
} ETH_DMADescTypeDef;
///**
// * @brief Received Frame Informations structure definition
// */
//typedef struct
//{
// ETH_DMADescTypeDef * FSRxDesc; /*!< First Segment Rx Desc */
/**
* @brief Received Frame Informations structure definition
*/
typedef struct
{
ETH_DMADescTypeDef * FSRxDesc; /*!< First Segment Rx Desc */
// ETH_DMADescTypeDef * LSRxDesc; /*!< Last Segment Rx Desc */
ETH_DMADescTypeDef * LSRxDesc; /*!< Last Segment Rx Desc */
// uint32_t SegCount; /*!< Segment count */
uint32_t SegCount; /*!< Segment count */
// uint32_t length; /*!< Frame length */
uint32_t length; /*!< Frame length */
// uint32_t buffer; /*!< Frame buffer */
//} ETH_DMARxFrameInfos;
uint32_t buffer; /*!< Frame buffer */
} ETH_DMARxFrameInfos;
//#define ETH_TypeDef void
///**
// * @brief ETH Handle Structure definition
// */
#define ETH_TypeDef void
/**
* @brief ETH Handle Structure definition
*/
//typedef struct
//{
// ETH_TypeDef * Instance; /*!< Register base address */
typedef struct
{
ETH_TypeDef * Instance; /*!< Register base address */
// ETH_InitTypeDef Init; /*!< Ethernet Init Configuration */
ETH_InitTypeDef Init; /*!< Ethernet Init Configuration */
// uint32_t LinkStatus; /*!< Ethernet link status */
uint32_t LinkStatus; /*!< Ethernet link status */
// ETH_DMADescTypeDef * RxDesc; /*!< Rx descriptor to Get */
ETH_DMADescTypeDef * RxDesc; /*!< Rx descriptor to Get */
// ETH_DMADescTypeDef * TxDesc; /*!< Tx descriptor to Set */
ETH_DMADescTypeDef * TxDesc; /*!< Tx descriptor to Set */
// ETH_DMARxFrameInfos RxFrameInfos; /*!< last Rx frame infos */
ETH_DMARxFrameInfos RxFrameInfos; /*!< last Rx frame infos */
// volatile HAL_ETH_StateTypeDef State; /*!< ETH communication state */
volatile HAL_ETH_StateTypeDef State; /*!< ETH communication state */
// HAL_LockTypeDef Lock; /*!< ETH Lock */
//} ETH_HandleTypeDef;
///* INTERNAL API FUNCTIONS. */
//BaseType_t xNetworkInterfaceInitialise( void );
//BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxNetworkBuffer,
// BaseType_t xReleaseAfterSend );
HAL_LockTypeDef Lock; /*!< ETH Lock */
} ETH_HandleTypeDef;
/* INTERNAL API FUNCTIONS. */
BaseType_t xNetworkInterfaceInitialise( void );
BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxNetworkBuffer,
BaseType_t xReleaseAfterSend );
///* The following function is defined only when BufferAllocation_1.c is linked in the project. */
//void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] );
/* The following function is defined only when BufferAllocation_1.c is linked in the project. */
void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] );
///* The following function is defined only when BufferAllocation_1.c is linked in the project. */
//BaseType_t xGetPhyLinkStatus( void );
///* *INDENT-OFF* */
//#ifdef __cplusplus
// } /* extern "C" */
//#endif
///* *INDENT-ON* */
/* The following function is defined only when BufferAllocation_1.c is linked in the project. */
BaseType_t xGetPhyLinkStatus( void );
/* *INDENT-OFF* */
#ifdef __cplusplus
} /* extern "C" */
#endif
/* *INDENT-ON* */
#endif /*STM32_PORT*/
#endif /* NETWORK_INTERFACE_H */

2995
FreeRTOS/source/portable/NetworkInterface/board_family/NetworkInterface.c
View File

File diff suppressed because it is too large Load Diff

2
RTE/RTOS/FreeRTOSConfig.h
View File

@ -64,7 +64,7 @@ extern uint32_t SystemCoreClock;
#define configUSE_16_BIT_TICKS 0
/* Software timer definitions. */
#define configUSE_TIMERS 0
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY 2
#define configTIMER_QUEUE_LENGTH 5
#define configTIMER_TASK_STACK_DEPTH (configMINIMAL_STACK_SIZE * 2)

2
RTE/_Target_1/RTE_Components.h
View File

@ -24,6 +24,8 @@
#define RTE_RTOS_FreeRTOS_EVENTGROUPS /* RTOS FreeRTOS Event Groups */
/* ARM.FreeRTOS::RTOS:Heap:Heap_4:10.5.1 */
#define RTE_RTOS_FreeRTOS_HEAP_4 /* RTOS FreeRTOS Heap 4 */
/* ARM.FreeRTOS::RTOS:Timers:10.5.1 */
#define RTE_RTOS_FreeRTOS_TIMERS /* RTOS FreeRTOS Timers */
/* GigaDevice::Device:GD32F10x_StdPeripherals:BKP:2.0.2 */
#define RTE_DEVICE_STDPERIPHERALS_BKP
/* GigaDevice::Device:GD32F10x_StdPeripherals:DMA:2.0.2 */

129
Test_project_for_GD32107C-EVAL.uvoptx
View File

@ -153,147 +153,34 @@
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F10x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F107VC$Flash\GD32F10x_CL.FLM))</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint>
<Bp>
<Number>0</Number>
<Type>0</Type>
<LineNumber>752</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>0</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>0</BreakIfRCount>
<Filename>.\FreeRTOS\source\FreeRTOS_TCP_IP.c</Filename>
<ExecCommand></ExecCommand>
<Expression></Expression>
</Bp>
<Bp>
<Number>1</Number>
<Type>0</Type>
<LineNumber>760</LineNumber>
<EnabledFlag>1</EnabledFlag>
<Address>0</Address>
<ByteObject>0</ByteObject>
<HtxType>0</HtxType>
<ManyObjects>0</ManyObjects>
<SizeOfObject>0</SizeOfObject>
<BreakByAccess>0</BreakByAccess>
<BreakIfRCount>0</BreakIfRCount>
<Filename>.\FreeRTOS\source\FreeRTOS_TCP_IP.c</Filename>
<ExecCommand></ExecCommand>
<Expression></Expression>
</Bp>
</Breakpoint>
<Breakpoint/>
<WatchWindow1>
<Ww>
<count>0</count>
<WinNumber>1</WinNumber>
<ItemText>tickCounter</ItemText>
<ItemText>pxDMARxDescriptor</ItemText>
</Ww>
<Ww>
<count>1</count>
<WinNumber>1</WinNumber>
<ItemText>xBoundTCPSocketsList</ItemText>
<ItemText>dma_current_rxdesc</ItemText>
</Ww>
<Ww>
<count>2</count>
<WinNumber>1</WinNumber>
<ItemText>mac</ItemText>
<ItemText>pxDescriptor</ItemText>
</Ww>
<Ww>
<count>3</count>
<WinNumber>1</WinNumber>
<ItemText>PHY</ItemText>
</Ww>
<Ww>
<count>4</count>
<WinNumber>1</WinNumber>
<ItemText>frame</ItemText>
</Ww>
<Ww>
<count>5</count>
<WinNumber>1</WinNumber>
<ItemText>dma_current_txdesc</ItemText>
</Ww>
<Ww>
<count>6</count>
<WinNumber>1</WinNumber>
<ItemText>xDHCPSocket</ItemText>
</Ww>
<Ww>
<count>7</count>
<WinNumber>1</WinNumber>
<ItemText>pucRxBuffer</ItemText>
</Ww>
<Ww>
<count>8</count>
<WinNumber>1</WinNumber>
<ItemText>EP_DHCPData</ItemText>
</Ww>
<Ww>
<count>9</count>
<WinNumber>1</WinNumber>
<ItemText>EP_IPv4_SETTINGS</ItemText>
</Ww>
<Ww>
<count>10</count>
<WinNumber>1</WinNumber>
<ItemText>xDHCPData</ItemText>
</Ww>
<Ww>
<count>11</count>
<WinNumber>1</WinNumber>
<ItemText>xNetworkAddressing</ItemText>
</Ww>
<Ww>
<count>12</count>
<WinNumber>1</WinNumber>
<ItemText>eLeasedAddress</ItemText>
</Ww>
<Ww>
<count>13</count>
<WinNumber>1</WinNumber>
<ItemText>pxSocket</ItemText>
</Ww>
<Ww>
<count>14</count>
<WinNumber>1</WinNumber>
<ItemText>prvServerConnectionInstance_Handle</ItemText>
</Ww>
<Ww>
<count>15</count>
<WinNumber>1</WinNumber>
<ItemText>pvBuffer</ItemText>
</Ww>
<Ww>
<count>16</count>
<WinNumber>1</WinNumber>
<ItemText>pxCurrentTCB</ItemText>
</Ww>
<Ww>
<count>17</count>
<WinNumber>1</WinNumber>
<ItemText>receiveBufferDescriptor</ItemText>
</Ww>
<Ww>
<count>18</count>
<WinNumber>1</WinNumber>
<ItemText>xNetworkEventQueue</ItemText>
</Ww>
<Ww>
<count>19</count>
<WinNumber>1</WinNumber>
<ItemText>FreeHeapSize</ItemText>
<ItemText>pucTemp</ItemText>
</Ww>
</WatchWindow1>
<MemoryWindow1>
<Mm>
<WinNumber>1</WinNumber>
<SubType>0</SubType>
<ItemText>frame</ItemText>
<ItemText>\\Test_project_for_GD32107C_EVAL\FreeRTOS/source/portable/NetworkInterface/board_family/NetworkInterface.c\receiveHandlerTask\pxDescriptor-&gt;pucEthernetBuffer</ItemText>
<AccSizeX>0</AccSizeX>
</Mm>
</MemoryWindow1>
@ -314,7 +201,7 @@
</Mm>
</MemoryWindow3>
<ScvdPack>
<Filename>C:\Users\User\AppData\Local\Arm\Packs\ARM\CMSIS-FreeRTOS\10.5.1\CMSIS\RTOS2\FreeRTOS\FreeRTOS.scvd</Filename>
<Filename>E:\Arm\Packs\ARM\CMSIS-FreeRTOS\10.5.1\CMSIS\RTOS2\FreeRTOS\FreeRTOS.scvd</Filename>
<Type>ARM.CMSIS-FreeRTOS.10.5.1</Type>
<SubType>1</SubType>
</ScvdPack>
@ -326,7 +213,7 @@
<periodic>1</periodic>
<aLwin>1</aLwin>
<aCover>0</aCover>
<aSer1>1</aSer1>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>1</viewmode>

8
Test_project_for_GD32107C-EVAL.uvprojx
View File

@ -338,7 +338,7 @@
<v6WtE>0</v6WtE>
<v6Rtti>0</v6Rtti>
<VariousControls>
<MiscControls>-D DEBUG -Wno-pragma-pack -Wno-macro-redefined</MiscControls>
<MiscControls>-D DEBUG -Wno-pragma-pack -Wno-macro-redefined -D CENTRALISED_DEFERRED_IRQ_HADLING</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath>.\FreeRTOS\source\portable\NetworkInterface\include;.\FreeRTOS\source\include;.\FreeRTOS\source\portable\Compiler\Keil;.\DemoTasks\include;..\GigaDevice_test;.\include;.\PHY</IncludePath>
@ -795,6 +795,12 @@
<targetInfo name="Target 1"/>
</targetInfos>
</component>
<component Cbundle="FreeRTOS" Cclass="RTOS" Cgroup="Timers" Cvendor="ARM" Cversion="10.5.1" condition="FreeRTOS Timers">
<package name="CMSIS-FreeRTOS" schemaVersion="1.7.7" url="https://www.keil.com/pack/" vendor="ARM" version="10.5.1"/>
<targetInfos>
<targetInfo name="Target 1"/>
</targetInfos>
</component>
<component Capiversion="2.2.0" Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Csub="Custom" Cvendor="ARM" Cversion="1.0.0" custom="1">
<package name="CMSIS" schemaVersion="1.7.7" url="http://www.keil.com/pack/" vendor="ARM" version="5.9.0"/>
<targetInfos>

2
main.c
View File

@ -277,7 +277,7 @@ static void vInitMCU(void)
/* Enable Ethernet MAC */
enet_descriptors_chain_init(ENET_DMA_TX);
enet_descriptors_chain_init(ENET_DMA_RX); //enet_desc_receive_complete_bit_enable(dma_current_rxdesc);
enet_descriptors_chain_init(ENET_DMA_RX);
enet_enable();
//nvic_irq_enable(ENET_IRQn, ipconfigMAC_INTERRUPT_PRIORITY, 0xFF);
__disable_irq();