diff --git a/.vs/TE_Controller/v14/.atsuo b/.vs/TE_Controller/v14/.atsuo
index 703f950..1b54fbe 100644
Binary files a/.vs/TE_Controller/v14/.atsuo and b/.vs/TE_Controller/v14/.atsuo differ
diff --git a/TE_Controller/TE_Controller.cproj b/TE_Controller/TE_Controller.cproj
index d6279ea..e8659d2 100644
--- a/TE_Controller/TE_Controller.cproj
+++ b/TE_Controller/TE_Controller.cproj
@@ -43,6 +43,7 @@
           <option id="sam0.drivers.tcc" value="Add" config="polled" content-id="Atmel.ASF" />
           <option id="sam0.services.rww_eeprom_emulator" value="Add" config="" content-id="Atmel.ASF" />
           <option id="thirdparty.os.freertos.version" value="Add" config="10.0.0" content-id="Atmel.ASF" />
+          <option id="sam0.drivers.wdt" value="Add" config="polled" content-id="Atmel.ASF" />
           <option id="common.services.usb.class.cdc.device.example" value="Add" config="" content-id="Atmel.ASF" />
           <option id="common.utils" value="Add" config="" content-id="Atmel.ASF" />
           <option id="sam0.utils.cmsis.samd21.source.template" value="Add" config="" content-id="Atmel.ASF" />
@@ -346,6 +347,12 @@
           <file path="src/ASF/sam0/drivers/tc/tc_interrupt.h" framework="" version="3.49.1" source="sam0\drivers\tc\tc_interrupt.h" changed="False" content-id="Atmel.ASF" />
           <file path="src/ASF/sam0/drivers/tc/tc.h" framework="" version="3.49.1" source="sam0\drivers\tc\tc.h" changed="False" content-id="Atmel.ASF" />
           <file path="src/ASF/sam0/drivers/tc/tc_sam_d_r_h/tc.c" framework="" version="3.49.1" source="sam0\drivers\tc\tc_sam_d_r_h\tc.c" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/wdt/wdt.c" framework="" version="3.49.1" source="sam0\drivers\wdt\wdt.c" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/wdt/wdt_callback.h" framework="" version="3.49.1" source="sam0\drivers\wdt\wdt_callback.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/wdt/wdt.h" framework="" version="3.49.1" source="sam0\drivers\wdt\wdt.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/wdt/quick_start/qs_wdt_basic.h" framework="" version="3.49.1" source="sam0\drivers\wdt\quick_start\qs_wdt_basic.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/wdt/quick_start_callback/qs_wdt_callback.h" framework="" version="3.49.1" source="sam0\drivers\wdt\quick_start_callback\qs_wdt_callback.h" changed="False" content-id="Atmel.ASF" />
+          <file path="src/ASF/sam0/drivers/wdt/wdt_callback.c" framework="" version="3.49.1" source="sam0\drivers\wdt\wdt_callback.c" changed="False" content-id="Atmel.ASF" />
         </files>
         <documentation help="https://asf.microchip.com/docs/3.49.1/common.services.usb.class.cdc.device.example.samd21_xpro/html/index.html" />
         <offline-documentation help="" />
@@ -397,6 +404,7 @@
       <Value>ADC_CALLBACK_MODE=true</Value>
       <Value>TCC_ASYNC=false</Value>
       <Value>TC_ASYNC=true</Value>
+      <Value>WDT_CALLBACK_MODE=false</Value>
     </ListValues>
   </armgcc.compiler.symbols.DefSymbols>
   <armgcc.compiler.directories.IncludePaths>
@@ -448,6 +456,7 @@
       <Value>../src/ASF/sam0/services/eeprom/emulator/rwwee_array</Value>
       <Value>../src/ASF/sam0/drivers/tc</Value>
       <Value>../src/ASF/sam0/drivers/tc/tc_sam_d_r_h</Value>
+      <Value>../src/ASF/sam0/drivers/wdt</Value>
     </ListValues>
   </armgcc.compiler.directories.IncludePaths>
   <armgcc.compiler.optimization.level>Optimize for size (-Os)</armgcc.compiler.optimization.level>
@@ -518,9 +527,10 @@
       <Value>../src/ASF/sam0/services/eeprom/emulator/rwwee_array</Value>
       <Value>../src/ASF/sam0/drivers/tc</Value>
       <Value>../src/ASF/sam0/drivers/tc/tc_sam_d_r_h</Value>
+      <Value>../src/ASF/sam0/drivers/wdt</Value>
     </ListValues>
   </armgcc.assembler.general.IncludePaths>
-  <armgcc.preprocessingassembler.general.AssemblerFlags>-DARM_MATH_CM0PLUS=true -DBOARD=SAMD21_XPLAINED_PRO -DEXTINT_CALLBACK_MODE=true -DUDD_ENABLE -DUSART_CALLBACK_MODE=true -DUSB_DEVICE_LPM_SUPPORT -D__SAMD21J18A__ -D__FREERTOS__ -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DTCC_ASYNC=false -DTC_ASYNC=true</armgcc.preprocessingassembler.general.AssemblerFlags>
+  <armgcc.preprocessingassembler.general.AssemblerFlags>-DARM_MATH_CM0PLUS=true -DBOARD=SAMD21_XPLAINED_PRO -DEXTINT_CALLBACK_MODE=true -DUDD_ENABLE -DUSART_CALLBACK_MODE=true -DUSB_DEVICE_LPM_SUPPORT -D__SAMD21J18A__ -D__FREERTOS__ -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DTCC_ASYNC=false -DTC_ASYNC=true -DWDT_CALLBACK_MODE=false</armgcc.preprocessingassembler.general.AssemblerFlags>
   <armgcc.preprocessingassembler.general.IncludePaths>
     <ListValues>
       <Value>../src</Value>
@@ -570,6 +580,7 @@
       <Value>../src/ASF/sam0/services/eeprom/emulator/rwwee_array</Value>
       <Value>../src/ASF/sam0/drivers/tc</Value>
       <Value>../src/ASF/sam0/drivers/tc/tc_sam_d_r_h</Value>
+      <Value>../src/ASF/sam0/drivers/wdt</Value>
     </ListValues>
   </armgcc.preprocessingassembler.general.IncludePaths>
 </ArmGcc>
@@ -598,6 +609,7 @@
       <Value>TCC_ASYNC=false</Value>
       <Value>TC_ASYNC=true</Value>
       <Value>ARM_PID</Value>
+      <Value>WDT_CALLBACK_MODE=false</Value>
     </ListValues>
   </armgcc.compiler.symbols.DefSymbols>
   <armgcc.compiler.directories.IncludePaths>
@@ -650,6 +662,7 @@
       <Value>../src/ASF/sam0/services/eeprom/emulator/rwwee_array</Value>
       <Value>../src/ASF/sam0/drivers/tc</Value>
       <Value>../src/ASF/sam0/drivers/tc/tc_sam_d_r_h</Value>
+      <Value>../src/ASF/sam0/drivers/wdt</Value>
     </ListValues>
   </armgcc.compiler.directories.IncludePaths>
   <armgcc.compiler.optimization.level>Optimize for size (-Os)</armgcc.compiler.optimization.level>
@@ -722,10 +735,11 @@
       <Value>../src/ASF/sam0/services/eeprom/emulator/rwwee_array</Value>
       <Value>../src/ASF/sam0/drivers/tc</Value>
       <Value>../src/ASF/sam0/drivers/tc/tc_sam_d_r_h</Value>
+      <Value>../src/ASF/sam0/drivers/wdt</Value>
     </ListValues>
   </armgcc.assembler.general.IncludePaths>
   <armgcc.assembler.debugging.DebugLevel>Default (-g)</armgcc.assembler.debugging.DebugLevel>
-  <armgcc.preprocessingassembler.general.AssemblerFlags>-DARM_MATH_CM0PLUS=true -DBOARD=USER_BOARD -DEXTINT_CALLBACK_MODE=true -DUDD_ENABLE -DUSART_CALLBACK_MODE=true -DUSB_DEVICE_LPM_SUPPORT -D__SAMD21E16B__ -D__FREERTOS__ -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DTCC_ASYNC=false -DTC_ASYNC=true</armgcc.preprocessingassembler.general.AssemblerFlags>
+  <armgcc.preprocessingassembler.general.AssemblerFlags>-DARM_MATH_CM0PLUS=true -DBOARD=USER_BOARD -DEXTINT_CALLBACK_MODE=true -DUDD_ENABLE -DUSART_CALLBACK_MODE=true -DUSB_DEVICE_LPM_SUPPORT -D__SAMD21E16B__ -D__FREERTOS__ -DSYSTICK_MODE -DADC_CALLBACK_MODE=true -DTCC_ASYNC=false -DTC_ASYNC=true -DWDT_CALLBACK_MODE=false</armgcc.preprocessingassembler.general.AssemblerFlags>
   <armgcc.preprocessingassembler.general.IncludePaths>
     <ListValues>
       <Value>../src</Value>
@@ -775,6 +789,7 @@
       <Value>../src/ASF/sam0/services/eeprom/emulator/rwwee_array</Value>
       <Value>../src/ASF/sam0/drivers/tc</Value>
       <Value>../src/ASF/sam0/drivers/tc/tc_sam_d_r_h</Value>
+      <Value>../src/ASF/sam0/drivers/wdt</Value>
     </ListValues>
   </armgcc.preprocessingassembler.general.IncludePaths>
   <armgcc.preprocessingassembler.debugging.DebugLevel>Default (-Wa,-g)</armgcc.preprocessingassembler.debugging.DebugLevel>
@@ -842,6 +857,8 @@
     <Folder Include="src\ASF\sam0\drivers\usb\" />
     <Folder Include="src\ASF\sam0\drivers\usb\stack_interface\" />
     <Folder Include="src\ASF\sam0\drivers\usb\usb_sam_d_r\" />
+    <Folder Include="src\ASF\sam0\drivers\wdt\" />
+    <Folder Include="src\ASF\sam0\drivers\wdt\quick_start\" />
     <Folder Include="src\ASF\sam0\services\" />
     <Folder Include="src\ASF\sam0\services\eeprom\" />
     <Folder Include="src\ASF\sam0\services\eeprom\emulator\" />
@@ -955,6 +972,15 @@
     <Compile Include="src\ASF\sam0\drivers\tc\tc_sam_d_r_h\tc.c">
       <SubType>compile</SubType>
     </Compile>
+    <None Include="src\ASF\sam0\drivers\wdt\quick_start\qs_wdt_basic.h">
+      <SubType>compile</SubType>
+    </None>
+    <Compile Include="src\ASF\sam0\drivers\wdt\wdt.c">
+      <SubType>compile</SubType>
+    </Compile>
+    <None Include="src\ASF\sam0\drivers\wdt\wdt.h">
+      <SubType>compile</SubType>
+    </None>
     <Compile Include="src\ASF\sam0\services\eeprom\emulator\rwwee_array\rww_eeprom.c">
       <SubType>compile</SubType>
     </Compile>
diff --git a/TE_Controller/src/ASF/common/utils/stdio/stdio_usb/stdio_usb.c b/TE_Controller/src/ASF/common/utils/stdio/stdio_usb/stdio_usb.c
index b829186..5ca7b5b 100644
--- a/TE_Controller/src/ASF/common/utils/stdio/stdio_usb/stdio_usb.c
+++ b/TE_Controller/src/ASF/common/utils/stdio/stdio_usb/stdio_usb.c
@@ -79,7 +79,7 @@ void stdio_usb_disable(void)
 }
 
 void stdio_usb_init(void)
-{
+{	
 	stdio_base = NULL;
 	ptr_put = stdio_usb_putchar;
 	ptr_get = stdio_usb_getchar;
diff --git a/TE_Controller/src/ASF/sam0/drivers/wdt/quick_start/qs_wdt_basic.h b/TE_Controller/src/ASF/sam0/drivers/wdt/quick_start/qs_wdt_basic.h
new file mode 100644
index 0000000..c363d37
--- /dev/null
+++ b/TE_Controller/src/ASF/sam0/drivers/wdt/quick_start/qs_wdt_basic.h
@@ -0,0 +1,98 @@
+/**
+ * \file
+ *
+ * \brief SAM Watchdog Driver Quick Start
+ *
+ * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+/**
+ * \page asfdoc_sam0_wdt_basic_use_case Quick Start Guide for WDT - Basic
+ *
+ * In this use case, the Watchdog module is configured for:
+ *  \li System reset after 2048 clocks of the Watchdog generic clock
+ *  \li Always on mode disabled
+ *  \li Basic mode, with no window or early warning periods
+ *
+ * This use case sets up the Watchdog to force a system reset after every 2048
+ * clocks of the Watchdog's Generic Clock channel, unless the user periodically
+ * resets the Watchdog counter via a button before the timer expires. If the
+ * Watchdog resets the device, a LED on the board is turned off.
+ *
+ * \section asfdoc_sam0_wdt_basic_use_case_setup Setup
+ *
+ * \subsection asfdoc_sam0_wdt_basic_use_case_setup_prereq Prerequisites
+ * There are no special setup requirements for this use-case.
+ *
+ * \subsection asfdoc_sam0_wdt_basic_use_case_setup_code Code
+ * Copy-paste the following setup code to your user application:
+ * \snippet qs_wdt_basic.c setup
+ *
+ * Add to user application initialization (typically the start of \c main()):
+ * \snippet qs_wdt_basic.c setup_init
+ *
+ * \subsection asfdoc_sam0_wdt_basic_use_case_setup_flow Workflow
+ * -# Create a Watchdog module configuration struct, which can be filled out to
+ *    adjust the configuration of the Watchdog.
+ *    \snippet qs_wdt_basic.c setup_1
+ * -# Initialize the Watchdog configuration struct with the module's default
+ *    values.
+ *    \snippet qs_wdt_basic.c setup_2
+ *    \note This should always be performed before using the configuration
+ *          struct to ensure that all values are initialized to known default
+ *          settings.
+ *
+ * -# Adjust the configuration struct to set the timeout period and lock mode
+ *    of the Watchdog.
+ *    \snippet qs_wdt_basic.c setup_3
+ * -# Setups the WDT hardware module with the requested settings.
+ *    \snippet qs_wdt_basic.c setup_4
+ *
+ * \section asfdoc_sam0_wdt_basic_use_case Use Case
+ *
+ * \subsection asfdoc_sam0_wdt_basic_use_case_code Code
+ * Copy-paste the following code to your user application:
+ * \snippet qs_wdt_basic.c main
+ *
+ * \subsection asfdoc_sam0_wdt_basic_use_case_main Workflow
+ * -# Retrieve the cause of the system reset to determine if the Watchdog module
+ *    was the cause of the last reset.
+ *    \snippet qs_wdt_basic.c main_1
+ * -# Turn on or off the board LED based on whether the Watchdog reset the device.
+ *    \snippet qs_wdt_basic.c main_2
+ * -# Enter an infinite loop to hold the main program logic.
+ *    \snippet qs_wdt_basic.c main_3
+ * -# Test to see if the board button is currently being pressed.
+ *    \snippet qs_wdt_basic.c main_4
+ * -# If the button is pressed, turn on the board LED and reset the Watchdog
+ *    timer.
+ *    \snippet qs_wdt_basic.c main_5
+ */
+/*
+ * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
+ */
diff --git a/TE_Controller/src/ASF/sam0/drivers/wdt/quick_start_callback/qs_wdt_callback.h b/TE_Controller/src/ASF/sam0/drivers/wdt/quick_start_callback/qs_wdt_callback.h
new file mode 100644
index 0000000..0b1665b
--- /dev/null
+++ b/TE_Controller/src/ASF/sam0/drivers/wdt/quick_start_callback/qs_wdt_callback.h
@@ -0,0 +1,101 @@
+/**
+ * \file
+ *
+ * \brief SAM Watchdog Driver Callback Quick Start
+ *
+ * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+
+/**
+ * \page asfdoc_sam0_wdt_callback_use_case Quick Start Guide for WDT - Callback
+ *
+ * In this use case, the Watchdog module is configured for:
+ *  \li System reset after 4096 clocks of the Watchdog generic clock
+ *  \li Always on mode disabled
+ *  \li Early warning period of 2048 clocks of the Watchdog generic clock
+ *
+ * This use case sets up the Watchdog to force a system reset after every 4096
+ * clocks of the Watchdog's Generic Clock channel, with an Early Warning
+ * callback being generated every 2048 clocks. Each time the Early Warning
+ * interrupt fires the board LED is turned on, and each time the device resets
+ * the board LED is turned off, giving a periodic flashing pattern.
+ *
+ *
+ * \section asfdoc_sam0_wdt_callback_use_case_setup Setup
+ *
+ * \subsection asfdoc_sam0_wdt_callback_use_case_setup_prereq Prerequisites
+ * There are no special setup requirements for this use-case.
+ *
+ * \subsection asfdoc_sam0_wdt_callback_use_case_setup_code Code
+ * Copy-paste the following setup code to your user application:
+ * \snippet qs_wdt_callback.c setup
+ *
+ * Add to user application initialization (typically the start of \c main()):
+ * \snippet qs_wdt_callback.c setup_init
+ *
+ * \subsection asfdoc_sam0_wdt_callback_use_case_setup_flow Workflow
+ * -# Configure and enable the Watchdog driver.
+ *  -# Create a Watchdog module configuration struct, which can be filled out to
+ *     adjust the configuration of the Watchdog.
+ *     \snippet qs_wdt_callback.c setup_1
+ *  -# Initialize the Watchdog configuration struct with the module's default
+ *     values.
+ *     \snippet qs_wdt_callback.c setup_2
+ *     \note This should always be performed before using the configuration
+ *           struct to ensure that all values are initialized to known default
+ *           settings.
+ *
+ *  -# Adjust the configuration struct to set the timeout and early warning
+ *     periods of the Watchdog.
+ *     \snippet qs_wdt_callback.c setup_3
+ *  -# Sets up the WDT hardware module with the requested settings.
+ *     \snippet qs_wdt_callback.c setup_4
+ * -# Register and enable the Early Warning callback handler.
+ *  -# Register the user-provided Early Warning callback function with the
+ *     driver, so that it will be run when an Early Warning condition occurs.
+ *     \snippet qs_wdt_callback.c setup_5
+ *  -# Enable the Early Warning callback so that it will generate callbacks.
+ *     \snippet qs_wdt_callback.c setup_6
+ *
+ * \section asfdoc_sam0_wdt_callback_use_case Use Case
+ *
+ * \subsection asfdoc_sam0_wdt_callback_use_case_code Code
+ * Copy-paste the following code to your user application:
+ * \snippet qs_wdt_callback.c main
+ *
+ * \subsection asfdoc_sam0_wdt_callback_use_case_main Workflow
+ * -# Turn off the board LED when the application starts.
+ *    \snippet qs_wdt_callback.c main_1
+ * -# Enable global interrupts so that callbacks can be generated.
+ *    \snippet qs_wdt_callback.c main_2
+ * -# Enter an infinite loop to hold the main program logic.
+ *    \snippet qs_wdt_callback.c main_3
+ */
+/*
+ * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
+ */
diff --git a/TE_Controller/src/ASF/sam0/drivers/wdt/wdt.c b/TE_Controller/src/ASF/sam0/drivers/wdt/wdt.c
new file mode 100644
index 0000000..3fae4d3
--- /dev/null
+++ b/TE_Controller/src/ASF/sam0/drivers/wdt/wdt.c
@@ -0,0 +1,254 @@
+/**
+ * \file
+ *
+ * \brief SAM Watchdog Driver
+ *
+ * Copyright (c) 2012-2020 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+/*
+ * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
+ */
+#include "wdt.h"
+#include <system.h>
+
+/**
+ * \brief Sets up the WDT hardware module based on the configuration.
+ *
+ * Writes a given configuration of a WDT configuration to the
+ * hardware module, and initializes the internal device struct.
+ *
+ * \param[in]  config  Pointer to the configuration struct
+ *
+ * \return Status of the configuration procedure.
+ *
+ * \retval STATUS_OK     If the module was configured correctly
+ * \retval STATUS_ERR_INVALID_ARG   If invalid argument(s) were supplied
+ * \retval STATUS_ERR_IO  If the Watchdog module is locked to be always on
+ */
+#if (SAML21) || (SAML22) || (SAMC20) || (SAMC21) || (SAMR30) || (SAMR34) || (SAMR35) || (WLR089)
+enum status_code wdt_set_config(
+		const struct wdt_conf *const config)
+{
+	/* Sanity check arguments */
+	Assert(config);
+
+	Wdt *const WDT_module = WDT;
+
+	/* Turn on the digital interface clock */
+	system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, MCLK_APBAMASK_WDT);
+
+	/* Check of the Watchdog has been locked to be always on, if so, abort */
+	if (wdt_is_locked()) {
+		return STATUS_ERR_IO;
+	}
+
+	/* Check for an invalid timeout period, abort if found */
+	if (config->timeout_period == WDT_PERIOD_NONE) {
+		return STATUS_ERR_INVALID_ARG;
+	}
+
+	/* Make sure the Window and Early Warning periods are not more than the
+	 * reset period, abort if either is invalid */
+	if ((config->timeout_period < config->window_period) ||
+			(config->timeout_period < config->early_warning_period)) {
+		return STATUS_ERR_INVALID_ARG;
+	}
+
+	/* Disable the Watchdog module */
+	WDT_module->CTRLA.reg &= ~WDT_CTRLA_ENABLE;
+
+	while (wdt_is_syncing()) {
+		/* Wait for all hardware modules to complete synchronization */
+	}
+
+	if(config->enable == false) {
+		return STATUS_OK;
+	}
+
+	uint32_t new_config = 0;
+
+	/* Update the timeout period value with the requested period */
+	new_config |= (config->timeout_period - 1) << WDT_CONFIG_PER_Pos;
+
+	/* Check if the user has requested a reset window period */
+	if (config->window_period != WDT_PERIOD_NONE) {
+		WDT_module->CTRLA.reg |= WDT_CTRLA_WEN;
+
+		/* Update and enable the timeout period value */
+		new_config |= (config->window_period - 1) << WDT_CONFIG_WINDOW_Pos;
+	} else {
+		/* Ensure the window enable control flag is cleared */
+		WDT_module->CTRLA.reg &= ~WDT_CTRLA_WEN;
+	}
+
+	while (wdt_is_syncing()) {
+		/* Wait for all hardware modules to complete synchronization */
+	}
+
+	/* Write the new Watchdog configuration */
+	WDT_module->CONFIG.reg = new_config;
+
+	/* Check if the user has requested an early warning period */
+	if (config->early_warning_period != WDT_PERIOD_NONE) {
+		/* Set the Early Warning period */
+		WDT_module->EWCTRL.reg
+			= (config->early_warning_period - 1) << WDT_EWCTRL_EWOFFSET_Pos;
+	}
+
+	/* Either enable or lock-enable the Watchdog timer depending on the user
+	 * settings */
+	if (config->always_on) {
+		WDT_module->CTRLA.reg |= WDT_CTRLA_ALWAYSON;
+	} else {
+		WDT_module->CTRLA.reg |= WDT_CTRLA_ENABLE;
+	}
+
+	while (wdt_is_syncing()) {
+		/* Wait for all hardware modules to complete synchronization */
+	}
+
+	return STATUS_OK;
+}
+#else
+enum status_code wdt_set_config(
+		const struct wdt_conf *const config)
+{
+	/* Sanity check arguments */
+	Assert(config);
+
+	Wdt *const WDT_module = WDT;
+
+	/* Turn on the digital interface clock */
+	system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, PM_APBAMASK_WDT);
+
+	/* Check of the Watchdog has been locked to be always on, if so, abort */
+	if (wdt_is_locked()) {
+		return STATUS_ERR_IO;
+	}
+
+	/* Check for an invalid timeout period, abort if found */
+	if (config->timeout_period == WDT_PERIOD_NONE) {
+		return STATUS_ERR_INVALID_ARG;
+	}
+
+	/* Make sure the Window and Early Warning periods are not more than the
+	 * reset period, abort if either is invalid */
+	if ((config->timeout_period < config->window_period) ||
+			(config->timeout_period < config->early_warning_period)) {
+		return STATUS_ERR_INVALID_ARG;
+	}
+
+	/* Disable the Watchdog module */
+	WDT_module->CTRL.reg &= ~WDT_CTRL_ENABLE;
+
+	while (wdt_is_syncing()) {
+		/* Wait for all hardware modules to complete synchronization */
+	}
+
+	if(config->enable == false) {
+		return STATUS_OK;
+	}
+
+	/* Configure GCLK channel and enable clock */
+	struct system_gclk_chan_config gclk_chan_conf;
+	gclk_chan_conf.source_generator = config->clock_source;
+	system_gclk_chan_set_config(WDT_GCLK_ID, &gclk_chan_conf);
+	system_gclk_chan_enable(WDT_GCLK_ID);
+	if (config->always_on) {
+		system_gclk_chan_lock(WDT_GCLK_ID);
+	}
+
+	uint32_t new_config = 0;
+
+	/* Update the timeout period value with the requested period */
+	new_config |= (config->timeout_period - 1) << WDT_CONFIG_PER_Pos;
+
+	/* Check if the user has requested a reset window period */
+	if (config->window_period != WDT_PERIOD_NONE) {
+		WDT_module->CTRL.reg |= WDT_CTRL_WEN;
+
+		/* Update and enable the timeout period value */
+		new_config |= (config->window_period - 1) << WDT_CONFIG_WINDOW_Pos;
+	} else {
+		/* Ensure the window enable control flag is cleared */
+		WDT_module->CTRL.reg &= ~WDT_CTRL_WEN;
+	}
+
+	while (wdt_is_syncing()) {
+		/* Wait for all hardware modules to complete synchronization */
+	}
+
+	/* Write the new Watchdog configuration */
+	WDT_module->CONFIG.reg = new_config;
+
+	/* Check if the user has requested an early warning period */
+	if (config->early_warning_period != WDT_PERIOD_NONE) {
+		while (wdt_is_syncing()) {
+			/* Wait for all hardware modules to complete synchronization */
+		}
+
+		/* Set the Early Warning period */
+		WDT_module->EWCTRL.reg
+			= (config->early_warning_period - 1) << WDT_EWCTRL_EWOFFSET_Pos;
+	}
+
+	/* Either enable or lock-enable the Watchdog timer depending on the user
+	 * settings */
+	if (config->always_on) {
+		WDT_module->CTRL.reg |= WDT_CTRL_ALWAYSON;
+	} else {
+		WDT_module->CTRL.reg |= WDT_CTRL_ENABLE;
+	}
+
+	while (wdt_is_syncing()) {
+		/* Wait for all hardware modules to complete synchronization */
+	}
+
+	return STATUS_OK;
+}
+#endif
+
+/**
+ * \brief Resets the count of the running Watchdog Timer that was previously enabled.
+ *
+ * Resets the current count of the Watchdog Timer, restarting the timeout
+ * period count elapsed. This function should be called after the window
+ * period (if one was set in the module configuration) but before the timeout
+ * period to prevent a reset of the system.
+ */
+void wdt_reset_count(void)
+{
+	Wdt *const WDT_module = WDT;
+
+	/* Disable the Watchdog module */
+	WDT_module->CLEAR.reg = WDT_CLEAR_CLEAR_KEY;
+
+	while (wdt_is_syncing()) {
+		/* Wait for all hardware modules to complete synchronization */
+	}
+}
diff --git a/TE_Controller/src/ASF/sam0/drivers/wdt/wdt.h b/TE_Controller/src/ASF/sam0/drivers/wdt/wdt.h
new file mode 100644
index 0000000..088f589
--- /dev/null
+++ b/TE_Controller/src/ASF/sam0/drivers/wdt/wdt.h
@@ -0,0 +1,495 @@
+/**
+ * \file
+ *
+ * \brief SAM Watchdog Driver
+ *
+ * Copyright (c) 2012-2020 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+/*
+ * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
+ */
+#ifndef WDT_H_INCLUDED
+#define WDT_H_INCLUDED
+
+/**
+ * \defgroup asfdoc_sam0_wdt_group SAM Watchdog (WDT) Driver
+ *
+ * This driver for Atmel&reg; | SMART ARM&reg;-based microcontrollers provides
+ * an interface for the configuration and management of the device's Watchdog
+ * Timer module, including the enabling, disabling, and kicking within the device.
+ * The following driver API modes are covered by this manual:
+ *
+ *  - Polled APIs
+ * \if WDT_CALLBACK_MODE
+ *  - Callback APIs
+ * \endif
+ *
+ * The following peripherals are used by this module:
+ *  - WDT (Watchdog Timer)
+ *
+ * The following devices can use this module:
+ *  - Atmel | SMART SAM D20/D21
+ *  - Atmel | SMART SAM R21
+ *  - Atmel | SMART SAM D09/D10/D11
+ *  - Atmel | SMART SAM L21/L22
+ *  - Atmel | SMART SAM DA1
+ *  - Atmel | SMART SAM C20/C21
+ *  - Atmel | SMART SAM HA1
+ *  - Atmel | SMART SAM R30
+ *  - Atmel | SMART SAM R34
+ *  - Atmel | SMART SAM R35
+ *
+ * The outline of this documentation is as follows:
+ *  - \ref asfdoc_sam0_wdt_prerequisites
+ *  - \ref asfdoc_sam0_wdt_module_overview
+ *  - \ref asfdoc_sam0_wdt_special_considerations
+ *  - \ref asfdoc_sam0_wdt_extra_info
+ *  - \ref asfdoc_sam0_wdt_examples
+ *  - \ref asfdoc_sam0_wdt_api_overview
+ *
+ *
+ * \section asfdoc_sam0_wdt_prerequisites Prerequisites
+ *
+ * There are no prerequisites for this module.
+ *
+ *
+ * \section asfdoc_sam0_wdt_module_overview Module Overview
+ *
+ * The Watchdog module (WDT) is designed to give an added level of safety in
+ * critical systems, to ensure a system reset is triggered in the case of a
+ * deadlock or other software malfunction that prevents normal device operation.
+ *
+ * At a basic level, the Watchdog is a system timer with a fixed period; once
+ * enabled, it will continue to count ticks of its asynchronous clock until
+ * it is periodically reset, or the timeout period is reached. In the event of a
+ * Watchdog timeout, the module will trigger a system reset identical to a pulse
+ * of the device's reset pin, resetting all peripherals to their power-on
+ * default states and restarting the application software from the reset vector.
+ *
+ * In many systems, there is an obvious upper bound to the amount of time each
+ * iteration of the main application loop can be expected to run, before a
+ * malfunction can be assumed (either due to a deadlock waiting on hardware or
+ * software, or due to other means). When the Watchdog is configured with a
+ * timeout period equal to this upper bound, a malfunction in the system will
+ * force a full system reset to allow for a graceful recovery.
+ *
+ * \subsection asfdoc_sam0_wdt_module_locked_mode Locked Mode
+ * The Watchdog configuration can be set in the device fuses and locked in
+ * hardware, so that no software changes can be made to the Watchdog
+ * configuration. Additionally, the Watchdog can be locked on in software if it
+ * is not already locked, so that the module configuration cannot be modified
+ * until a power on reset of the device.
+ *
+ * The locked configuration can be used to ensure that faulty software does not
+ * cause the Watchdog configuration to be changed, preserving the level of
+ * safety given by the module.
+ *
+ * \subsection asfdoc_sam0_wdt_module_window_mode Window Mode
+ * Just as there is a reasonable upper bound to the time the main program loop
+ * should take for each iteration, there is also in many applications a lower
+ * bound, i.e. a \a minimum time for which each loop iteration should run for
+ * under normal circumstances. To guard against a system failure resetting the
+ * Watchdog in a tight loop (or a failure in the system application causing the
+ * main loop to run faster than expected) a "Window" mode can be enabled to
+ * disallow resetting of the Watchdog counter before a certain period of time.
+ * If the Watchdog is not reset \a after the window opens but not \a before the
+ * Watchdog expires, the system will reset.
+ *
+ * \subsection asfdoc_sam0_wdt_module_early_warning Early Warning
+ * In some cases it is desirable to receive an early warning that the Watchdog is
+ * about to expire, so that some system action (such as saving any system
+ * configuration data for failure analysis purposes) can be performed before the
+ * system reset occurs. The Early Warning feature of the Watchdog module allows
+ * such a notification to be requested; after the configured early warning time
+ * (but before the expiry of the Watchdog counter) the Early Warning flag will
+ * become set, so that the user application can take an appropriate action.
+ *
+ * \note It is important to note that the purpose of the Early Warning feature
+ *       is \a not to allow the user application to reset the Watchdog; doing
+ *       so will defeat the safety the module gives to the user application.
+ *       Instead, this feature should be used purely to perform any tasks that
+ *       need to be undertaken before the system reset occurs.
+ *
+ * \subsection asfdoc_sam0_wdt_module_overview_physical Physical Connection
+ *
+ * \ref asfdoc_sam0_wdt_module_int_connections "The figure below" shows how
+ * this module is interconnected within the device.
+ *
+ * \anchor asfdoc_sam0_wdt_module_int_connections
+ * \dot
+ * digraph overview {
+ *   rankdir=LR;
+ *   node [label="GCLK*\nGeneric Clock" shape=square] wdt_clock;
+ *
+ *   subgraph driver {
+ *     node [label="<f0> WDT | <f1> Watchdog Counter" shape=record] wdt_module;
+ *     node [label="System Reset Logic" shape=ellipse style=filled fillcolor=lightgray] sys_reset;
+ *   }
+ *
+ *   wdt_clock     -> wdt_module:f1;
+ *   wdt_module:f1 -> sys_reset;
+ * }
+ * \enddot
+ *
+ * \note Watchdog Counter of SAM L21/L22/R30/R34/R35 is \a not provided by GCLK, but it uses an
+ *       internal 1KHz OSCULP32K output clock.
+ *
+ * \section asfdoc_sam0_wdt_special_considerations Special Considerations
+ *
+ * On some devices the Watchdog configuration can be fused to be always on in
+ * a particular configuration; if this mode is enabled the Watchdog is not
+ * software configurable and can have its count reset and early warning state
+ * checked/cleared only.
+ *
+ * \section asfdoc_sam0_wdt_extra_info Extra Information
+ *
+ * For extra information, see \ref asfdoc_sam0_wdt_extra. This includes:
+ *  - \ref asfdoc_sam0_wdt_extra_acronyms
+ *  - \ref asfdoc_sam0_wdt_extra_dependencies
+ *  - \ref asfdoc_sam0_wdt_extra_errata
+ *  - \ref asfdoc_sam0_wdt_extra_history
+ *
+ *
+ * \section asfdoc_sam0_wdt_examples Examples
+ *
+ * For a list of examples related to this driver, see
+ * \ref asfdoc_sam0_wdt_exqsg.
+ *
+ * \section asfdoc_sam0_wdt_api_overview API Overview
+ * @{
+ */
+
+#include <compiler.h>
+#include <clock.h>
+#include <gclk.h>
+
+#if WDT_CALLBACK_MODE == true
+#  include "wdt_callback.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \brief Watchdog Timer period configuration enum.
+ *
+ * Enum for the possible period settings of the Watchdog timer module, for
+ * values requiring a period as a number of Watchdog timer clock ticks.
+ */
+enum wdt_period {
+	/** No Watchdog period. This value can only be used when setting the
+	 *  Window and Early Warning periods; its use as the Watchdog Reset
+	 *  Period is invalid. */
+	WDT_PERIOD_NONE     = 0,
+	/** Watchdog period of 8 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_8CLK     = 1,
+	/** Watchdog period of 16 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_16CLK    = 2,
+	/** Watchdog period of 32 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_32CLK    = 3,
+	/** Watchdog period of 64 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_64CLK    = 4,
+	/** Watchdog period of 128 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_128CLK   = 5,
+	/** Watchdog period of 256 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_256CLK   = 6,
+	/** Watchdog period of 512 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_512CLK   = 7,
+	/** Watchdog period of 1024 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_1024CLK  = 8,
+	/** Watchdog period of 2048 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_2048CLK  = 9,
+	/** Watchdog period of 4096 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_4096CLK  = 10,
+	/** Watchdog period of 8192 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_8192CLK  = 11,
+	/** Watchdog period of 16384 clocks of the Watchdog Timer Generic Clock */
+	WDT_PERIOD_16384CLK = 12,
+};
+
+/**
+ * \brief Watchdog Timer configuration structure.
+ *
+ *  Configuration structure for a Watchdog Timer instance. This
+ *  structure should be initialized by the \ref wdt_get_config_defaults()
+ *  function before being modified by the user application.
+ */
+struct wdt_conf {
+	/** If \c true, the Watchdog will be locked to the current configuration
+	 *  settings when the Watchdog is enabled */
+	bool always_on;
+	/** Enable/Disable the Watchdog Timer */
+	bool enable;
+#if !(SAML21) && !(SAML22) && !(SAMC20) && !(SAMC21) && !(SAMR30) && !(SAMR34) && !(SAMR35) && !(WLR089)
+	/** GCLK generator used to clock the peripheral except SAM L21/L22/C21/C20/R30*/
+	enum gclk_generator clock_source;
+#endif
+	/** Number of Watchdog timer clock ticks until the Watchdog expires */
+	enum wdt_period timeout_period;
+	/** Number of Watchdog timer clock ticks until the reset window opens */
+	enum wdt_period window_period;
+	/** Number of Watchdog timer clock ticks until the early warning flag is
+	 *  set */
+	enum wdt_period early_warning_period;
+};
+
+/** \name Configuration and Initialization
+ * @{
+ */
+
+/**
+ * \brief Determines if the hardware module(s) are currently synchronizing to the bus.
+ *
+ * Checks to see if the underlying hardware peripheral module(s) are currently
+ * synchronizing across multiple clock domains to the hardware bus. This
+ * function can be used to delay further operations on a module until such time
+ * that it is ready, to prevent blocking delays for synchronization in the
+ * user application.
+ *
+ * \return Synchronization status of the underlying hardware module(s).
+ *
+ * \retval false If the module has completed synchronization
+ * \retval true If the module synchronization is ongoing
+ */
+static inline bool wdt_is_syncing(void)
+{
+	Wdt *const WDT_module = WDT;
+
+#if (SAML21) || (SAML22) || (SAMC20) || (SAMC21) || (SAMR30) || (SAMR34) || (SAMR35) || (WLR089)
+	if (WDT_module->SYNCBUSY.reg) {
+#else
+	if (WDT_module->STATUS.reg & WDT_STATUS_SYNCBUSY) {
+#endif
+		return true;
+	}
+
+	return false;
+}
+
+/**
+ * \brief Initializes a Watchdog Timer configuration structure to defaults.
+ *
+ *  Initializes a given Watchdog Timer configuration structure to a set of
+ *  known default values. This function should be called on all new
+ *  instances of these configuration structures before being modified by the
+ *  user application.
+ *
+ *  The default configuration is as follows:
+ *   \li Not locked, to allow for further (re-)configuration
+ *   \li Enable WDT
+ *   \li Watchdog timer sourced from Generic Clock Channel 4
+ *   \li A timeout period of 16384 clocks of the Watchdog module clock
+ *   \li No window period, so that the Watchdog count can be reset at any time
+ *   \li No early warning period to indicate the Watchdog will soon expire
+ *
+ *  \param[out] config  Configuration structure to initialize to default values
+ */
+static inline void wdt_get_config_defaults(
+		struct wdt_conf *const config)
+{
+	/* Sanity check arguments */
+	Assert(config);
+
+	/* Default configuration values */
+	config->always_on            = false;
+	config->enable               = true;
+#if !(SAML21) && !(SAML22) && !(SAMC20) && !(SAMC21) && !(SAMR30) && !(SAMR34) && !(SAMR35) && !(WLR089)
+	config->clock_source         = GCLK_GENERATOR_4;
+#endif
+	config->timeout_period       = WDT_PERIOD_16384CLK;
+	config->window_period        = WDT_PERIOD_NONE;
+	config->early_warning_period = WDT_PERIOD_NONE;
+}
+
+enum status_code wdt_set_config(
+		const struct wdt_conf *const config);
+
+/** \brief Determines if the Watchdog timer is currently locked in an enabled state.
+ *
+ *  Determines if the Watchdog timer is currently enabled and locked, so that
+ *  it cannot be disabled or otherwise reconfigured.
+ *
+ *  \return Current Watchdog lock state.
+ */
+static inline bool wdt_is_locked(void)
+{
+	Wdt *const WDT_module = WDT;
+
+#if (SAML21) || (SAML22) || (SAMC20) || (SAMC21) || (SAMR30) || (SAMR34) || (SAMR35) || (WLR089)
+	return (WDT_module->CTRLA.reg & WDT_CTRLA_ALWAYSON);
+#else
+	return (WDT_module->CTRL.reg & WDT_CTRL_ALWAYSON);
+#endif
+}
+
+/** @} */
+
+/** \name Timeout and Early Warning Management
+ * @{
+ */
+
+/** \brief Clears the Watchdog timer early warning period elapsed flag.
+ *
+ *  Clears the Watchdog timer early warning period elapsed flag, so that a new
+ *  early warning period can be detected.
+ */
+static inline void wdt_clear_early_warning(void)
+{
+	Wdt *const WDT_module = WDT;
+
+	WDT_module->INTFLAG.reg = WDT_INTFLAG_EW;
+}
+
+/** \brief Determines if the Watchdog timer early warning period has elapsed.
+ *
+ *  Determines if the Watchdog timer early warning period has elapsed.
+ *
+ *  \note If no early warning period was configured, the value returned by this
+ *        function is invalid.
+ *
+ *  \return Current Watchdog Early Warning state.
+ */
+static inline bool wdt_is_early_warning(void)
+{
+	Wdt *const WDT_module = WDT;
+
+	return (WDT_module->INTFLAG.reg & WDT_INTFLAG_EW);
+}
+
+void wdt_reset_count(void);
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+
+/**
+ * \page asfdoc_sam0_wdt_extra Extra Information for WDT Driver
+ *
+ * \section asfdoc_sam0_wdt_extra_acronyms Acronyms
+ * The table below presents the acronyms used in this module:
+ *
+ * <table>
+ *	<tr>
+ *		<th>Acronym</th>
+ *		<th>Description</th>
+ *	</tr>
+ *	<tr>
+ *		<td>WDT</td>
+ *		<td>Watchdog Timer</td>
+ *	</tr>
+ * </table>
+ *
+ *
+ * \section asfdoc_sam0_wdt_extra_dependencies Dependencies
+ * This driver has the following dependencies:
+ *
+ *  - \ref asfdoc_sam0_system_clock_group "System Clock Driver"
+ *
+ *
+ * \section asfdoc_sam0_wdt_extra_errata Errata
+ * There are no errata related to this driver.
+ *
+ *
+ * \section asfdoc_sam0_wdt_extra_history Module History
+ * An overview of the module history is presented in the table below, with
+ * details on the enhancements and fixes made to the module since its first
+ * release. The current version of this corresponds to the newest version in
+ * the table.
+ *
+ * <table>
+ *	<tr>
+ *		<th>Changelog</th>
+ *	</tr>
+ *	<tr>
+ *		<td>Driver updated to follow driver type convention:
+ *             \li wdt_init, wdt_enable, wdt_disable functions removed
+ *             \li wdt_set_config function added
+ *             \li WDT module enable state moved inside the configuration struct </td>
+ *	</tr>
+ *	<tr>
+ *		<td>Initial Release</td>
+ *	</tr>
+ * </table>
+ */
+
+/**
+ * \page asfdoc_sam0_wdt_exqsg Examples for WDT Driver
+ *
+ * This is a list of the available Quick Start guides (QSGs) and example
+ * applications for \ref asfdoc_sam0_wdt_group. QSGs are simple examples with
+ * step-by-step instructions to configure and use this driver in a selection of
+ * use cases. Note that a QSG can be compiled as a standalone application or be
+ * added to the user application.
+ *
+ *  - \subpage asfdoc_sam0_wdt_basic_use_case
+ * \if WDT_CALLBACK_MODE
+ *  - \subpage asfdoc_sam0_wdt_callback_use_case
+ * \endif
+ *
+ * \page asfdoc_sam0_wdt_document_revision_history Document Revision History
+ *
+ * <table>
+ *	<tr>
+ *		<th>Doc. Rev.</th>
+ *		<th>Date</th>
+ *		<th>Comments</th>
+ *	</tr>
+ *	<tr>
+ *		<td>42124E</td>
+ *		<td>12/2015</td>
+ *		<td>Added support for SAM L21/L22, SAM DA1, SAM D09, SAM R30, and SAM C20/C21</td>
+ *	</tr>
+ *	<tr>
+ *		<td>42124D</td>
+ *		<td>12/2014</td>
+ *		<td>Added SAM R21 and SAM D10/D11 support</td>
+ *	</tr>
+ *	<tr>
+ *		<td>42124C</td>
+ *		<td>01/2014</td>
+ *		<td>Add SAM D21 support</td>
+ *	</tr>
+ *	<tr>
+ *		<td>42124B</td>
+ *		<td>06/2013</td>
+ *		<td>Corrected documentation typos</td>
+ *	</tr>
+ *	<tr>
+ *		<td>42124A</td>
+ *		<td>06/2013</td>
+ *		<td>Initial release</td>
+ *	</tr>
+ * </table>
+ */
+
+#endif /* WDT_H_INCLUDED */
diff --git a/TE_Controller/src/ASF/sam0/drivers/wdt/wdt_callback.c b/TE_Controller/src/ASF/sam0/drivers/wdt/wdt_callback.c
new file mode 100644
index 0000000..d904fb0
--- /dev/null
+++ b/TE_Controller/src/ASF/sam0/drivers/wdt/wdt_callback.c
@@ -0,0 +1,164 @@
+/**
+ * \file
+ *
+ * \brief SAM Watchdog Driver
+ *
+ * Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+/*
+ * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
+ */
+#include "wdt.h"
+#include <system.h>
+#include <system_interrupt.h>
+
+wdt_callback_t wdt_early_warning_callback;
+
+/**
+ * \brief Registers an asynchronous callback function with the driver.
+ *
+ * Registers an asynchronous callback with the WDT driver, fired when a
+ * given criteria (such as an Early Warning) is met. Callbacks are fired once
+ * for each event.
+ *
+ * \param[in] callback  Pointer to the callback function to register
+ * \param[in] type      Type of callback function to register
+ *
+ * \return Status of the registration operation.
+ * \retval STATUS_OK               The callback was registered successfully
+ * \retval STATUS_ERR_INVALID_ARG  If an invalid callback type was supplied
+ */
+enum status_code wdt_register_callback(
+		const wdt_callback_t callback,
+		const enum wdt_callback type)
+{
+	/* Sanity check arguments */
+	Assert(callback);
+
+	switch (type)
+	{
+	case WDT_CALLBACK_EARLY_WARNING:
+		wdt_early_warning_callback = callback;
+		return STATUS_OK;
+	default:
+		Assert(false);
+		return STATUS_ERR_INVALID_ARG;
+	}
+}
+
+/**
+ * \brief Unregisters an asynchronous callback function with the driver.
+ *
+ * Unregisters an asynchronous callback with the WDT driver, removing it
+ * from the internal callback registration table.
+ *
+ * \param[in] type  Type of callback function to unregister
+ *
+ * \return Status of the de-registration operation.
+ * \retval STATUS_OK               The callback was Unregistered successfully
+ * \retval STATUS_ERR_INVALID_ARG  If an invalid callback type was supplied
+ */
+enum status_code wdt_unregister_callback(
+		const enum wdt_callback type)
+{
+	switch (type)
+	{
+	case WDT_CALLBACK_EARLY_WARNING:
+		wdt_early_warning_callback = NULL;
+		return STATUS_OK;
+	default:
+		Assert(false);
+		return STATUS_ERR_INVALID_ARG;
+	}
+}
+
+/**
+ * \brief Enables asynchronous callback generation for a given type.
+ *
+ * Enables asynchronous callbacks for a given callback type. This must be
+ * called before an external interrupt channel will generate callback events.
+ *
+ * \param[in] type  Type of callback function to enable
+ *
+ * \return Status of the callback enable operation.
+ * \retval STATUS_OK               The callback was enabled successfully
+ * \retval STATUS_ERR_INVALID_ARG  If an invalid callback type was supplied
+ */
+enum status_code wdt_enable_callback(
+		const enum wdt_callback type)
+{
+	Wdt *const WDT_module = WDT;
+
+	switch (type)
+	{
+	case WDT_CALLBACK_EARLY_WARNING:
+		WDT_module->INTENSET.reg = WDT_INTENSET_EW;
+		system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_WDT);
+		return STATUS_OK;
+	default:
+		Assert(false);
+		return STATUS_ERR_INVALID_ARG;
+	}
+}
+
+/**
+ * \brief Disables asynchronous callback generation for a given type.
+ *
+ * Disables asynchronous callbacks for a given callback type.
+ *
+ * \param[in] type  Type of callback function to disable
+ *
+ * \return Status of the callback disable operation.
+ * \retval STATUS_OK               The callback was disabled successfully
+ * \retval STATUS_ERR_INVALID_ARG  If an invalid callback type was supplied
+ */
+enum status_code wdt_disable_callback(
+		const enum wdt_callback type)
+{
+	Wdt *const WDT_module = WDT;
+
+	switch (type)
+	{
+	case WDT_CALLBACK_EARLY_WARNING:
+		WDT_module->INTENCLR.reg = WDT_INTENCLR_EW;
+		return STATUS_OK;
+	default:
+		Assert(false);
+		return STATUS_ERR_INVALID_ARG;
+	}
+}
+
+/** Handler for the WDT hardware module interrupt. */
+void WDT_Handler(void)
+{
+	wdt_clear_early_warning();
+
+	if (wdt_early_warning_callback) {
+		wdt_early_warning_callback();
+	}
+}
diff --git a/TE_Controller/src/ASF/sam0/drivers/wdt/wdt_callback.h b/TE_Controller/src/ASF/sam0/drivers/wdt/wdt_callback.h
new file mode 100644
index 0000000..fdbb2fa
--- /dev/null
+++ b/TE_Controller/src/ASF/sam0/drivers/wdt/wdt_callback.h
@@ -0,0 +1,95 @@
+/**
+ * \file
+ *
+ * \brief SAM Watchdog Driver
+ *
+ * Copyright (c) 2013-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+/*
+ * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
+ */
+#ifndef WDT_CALLBACK_H_INCLUDED
+#define WDT_CALLBACK_H_INCLUDED
+
+#include <compiler.h>
+#include "wdt.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * \addtogroup asfdoc_sam0_wdt_group
+ *
+ * @{
+ */
+
+/** \name Callback Configuration and Initialization
+ * @{
+ */
+
+/** Type definition for a WDT module callback function. */
+typedef void (*wdt_callback_t)(void);
+
+/** Enum for the possible callback types for the WDT module. */
+enum wdt_callback
+{
+	/** Callback type for when an early warning callback from the WDT module
+	 *  is issued
+	 */
+	WDT_CALLBACK_EARLY_WARNING,
+};
+
+enum status_code wdt_register_callback(
+		const wdt_callback_t callback,
+		const enum wdt_callback type);
+
+enum status_code wdt_unregister_callback(
+		const enum wdt_callback type);
+
+/** @} */
+
+/** \name Callback Enabling and Disabling
+ * @{
+ */
+
+enum status_code wdt_enable_callback(
+		const enum wdt_callback type);
+
+enum status_code wdt_disable_callback(
+		const enum wdt_callback type);
+
+/** @} */
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/TE_Controller/src/asf.h b/TE_Controller/src/asf.h
index 0db73cb..b3b917f 100644
--- a/TE_Controller/src/asf.h
+++ b/TE_Controller/src/asf.h
@@ -160,4 +160,7 @@
 #include <udc.h>
 #include <udd.h>
 
+// From module: WDT - Watchdog Timer (Polled APIs)
+#include <wdt.h>
+
 #endif // ASF_H
diff --git a/TE_Controller/src/config/FreeRTOSConfig.h b/TE_Controller/src/config/FreeRTOSConfig.h
index 7268d91..0b0fe61 100644
--- a/TE_Controller/src/config/FreeRTOSConfig.h
+++ b/TE_Controller/src/config/FreeRTOSConfig.h
@@ -57,7 +57,7 @@
 #define configTICK_RATE_HZ						( 1000 )
 #define configMAX_PRIORITIES					( 5 )
 #define configMINIMAL_STACK_SIZE				( ( unsigned short ) 64 )
-#define configTOTAL_HEAP_SIZE					( ( size_t ) ( 4 * 1024 + 128) )
+#define configTOTAL_HEAP_SIZE					( ( size_t ) ( 4 * 1024 + 128-128) )
 #define configMAX_TASK_NAME_LEN					( 24 )
 #define configUSE_TRACE_FACILITY				1
 #define configUSE_16_BIT_TICKS					0
diff --git a/TE_Controller/src/include/power_regulator.h b/TE_Controller/src/include/power_regulator.h
index 37144f6..608a60a 100644
--- a/TE_Controller/src/include/power_regulator.h
+++ b/TE_Controller/src/include/power_regulator.h
@@ -15,13 +15,13 @@
 
 #define TEC_POWER_COEFF_DEFAULT	40.0F
 
-#define TEC_TEMP_DELTA		0.01F
-#define TEMP_SETPOINT_DIFF 1.0F
+#define TEC_TEMP_DELTA		0.08F
+#define TEMP_SETPOINT_DIFF 0.5F
 #define TEMP_SETPOINT_DELTA_OVER_DEWOPINT_MIN 5.0F
 #define TEMP_SETPOINT_DELTA_OVER_DEWOPINT_MAX 10.0F
 #define TEMP_GRADIENT_LIMIT	70
 #ifdef ARM_PID
-#define TEC_POWER_DELTA		0.08F	//0.08F
+#define TEC_POWER_DELTA		0.01F	//0.08F
 #define COEFF_PROPORTIONAL	0.6F	//0.6F
 #define COEFF_INTEGRAL		0.00011F//0.00011F
 #define COEFF_DIFFERENTIAL	0.2F	//0.2F	
diff --git a/TE_Controller/src/include/tec.h b/TE_Controller/src/include/tec.h
index 3539076..ce507d0 100644
--- a/TE_Controller/src/include/tec.h
+++ b/TE_Controller/src/include/tec.h
@@ -10,10 +10,16 @@
 #define TEC_H_
 #include <asf.h>
 
+#define PWM_CHANNEL_SNGATE 3
+#define PWM_CHANNEL_SPGATE 2
+#define PWM_PIN_OUTPUT_SNGATE 7
+#define PWM_PIN_OUTPUT_SPGATE 6
+
 bool VTEC_read(float	*p_Vin, float	*p_VTEC);
 bool ITEC_read(float	*p_Vin, float	*p_ITEC);
 void TEC_L_set(bool	value);
 void TEC_set_level(float	value);
 void TEC_set_TEMPSET_volt(float	value);
 void pin_set_output(uint8_t	pin, bool	output_flag, uint8_t	value);
+void TEC_Init(void);
 #endif /* TEC_H_ */
\ No newline at end of file
diff --git a/TE_Controller/src/main.c b/TE_Controller/src/main.c
index 88b5554..66cb455 100644
--- a/TE_Controller/src/main.c
+++ b/TE_Controller/src/main.c
@@ -44,9 +44,7 @@
 #include "cmd.h"
 #include "usb_hub.h"
 #include "eeprom.h"
-//#include "mcu_control.h"
-//#include "adn8831.h"
-//#include "tm_ds18b20.h"
+
 
 #define PORT_STDIO	0
 #define PORT_DATA	1
@@ -54,7 +52,6 @@ extern CMD_t command;
 uint16_t adc_value = 100;
 
 static volatile bool main_b_cdc_enable = false;
-//struct measured_params	m_params;
 Controller_t Controller;
 
 #ifdef ARM_PID
@@ -72,7 +69,7 @@ UBaseType_t uxHighWaterMark_cdc_rx, uxHighWaterMark_cdc_tx, uxHighWaterMark_meas
 uxHighWaterMark_regulator, uxHighWaterMark_backlight;
 #define GET_STACK_HWM_CDC_RX()    uxHighWaterMark_cdc_rx	= uxTaskGetStackHighWaterMark( NULL );
 #define GET_STACK_HWM_CDC_TX()    uxHighWaterMark_cdc_tx	= uxTaskGetStackHighWaterMark( NULL );
-#define GET_STACK_HWM_MEASURE()	  uxTaskGetStackHighWaterMark( NULL );
+#define GET_STACK_HWM_MEASURE()	  uxHighWaterMark_measure   = uxTaskGetStackHighWaterMark( NULL );
 #define GET_STACK_HWM_REGULATOR() uxHighWaterMark_regulator = uxTaskGetStackHighWaterMark( NULL );
 #define GET_STACK_HWM_BACKLIGHT() uxHighWaterMark_backlight = uxTaskGetStackHighWaterMark( NULL );
 #else
@@ -83,6 +80,11 @@ uxHighWaterMark_regulator, uxHighWaterMark_backlight;
 #define GET_STACK_HWM_BACKLIGHT()
 #endif
 
+#ifndef DEBUG_WDT
+	#define WDT_RESET() wdt_reset_count();
+#else
+	#define WDT_RESET()	
+#endif
 /************************************************************************
 * \fn int main(void)
 * \brief Main function. Execution starts here.
@@ -93,12 +95,11 @@ int main(void)
 {
 	irq_initialize_vectors();
 	cpu_irq_enable();	
-	//sleepmgr_init();
 	system_init();	
 	InitMCU();
 		
 	InitTask_cdc_rx_tx();	
-	InitTask_measure(); //InitTask_measure_DHT22();InitTask_led_blink();//ui_init();//ui_powerdown();
+	InitTask_measure();
 	InitTask_regulator();	
 #ifndef DEBUG_REGULATOR	
 	InitTask_backlight();
@@ -135,7 +136,14 @@ void ReadEEParameters(void)
 * \return
 ************************************************************************/
 void InitMCU(void)
-{	
+{
+#ifndef DEBUG_WDT
+	struct wdt_conf wdt_config;
+	wdt_get_config_defaults(&wdt_config);
+	wdt_config.clock_source		= GCLK_GENERATOR_2;		
+	if(wdt_set_config(&wdt_config) == STATUS_OK)
+		wdt_reset_count();
+#endif		
 	led_configure_port_pins();
 	LED_Off(LED_PIN);	
 	configure_eeprom();
@@ -196,7 +204,8 @@ void Task_measure(void *parameters)
 	};	
 	GET_STACK_HWM_MEASURE()
 	for (;;)
-	{	
+	{
+		WDT_RESET();		
 		if(command.tot_on)
 		{						
 			measureADC(&tecCamSideTempAvg);		
@@ -236,10 +245,12 @@ void Task_regulator(void *parameters)
 #ifndef ARM_PID
 	temprChange_t change;
 	change.initialized = false;	
-#endif				 
+#endif
+	TEC_Init();				 
 	GET_STACK_HWM_REGULATOR();
 	for (;;)
 	{	
+		WDT_RESET();
 		DataLock();			
 		TempPID_Regulator(command.tec_on && command.tot_on, &Controller, &pid);		
 		DataUnlock();	
@@ -255,29 +266,74 @@ void Task_regulator(void *parameters)
 * \param
 * \return
 ************************************************************************/
+#ifndef DEBUG_RX
+__attribute__((optimize("Os")))
+void Task_cdc_rx(void *parameters)
+{
+	#define PORT0  0	
+	iram_size_t len = 0;
+	static size_t totLen = 0;
+	static char readBuf[BUF_LEN] = {0};
+	static char tmpBuf[BUF_LEN] = {0};
+	GET_STACK_HWM_CDC_RX();	
+	while(true)
+	{
+		WDT_RESET();
+		if(main_b_cdc_enable &&
+		(len = udi_cdc_multi_get_nb_received_data(PORT0)) > 0 &&
+		udi_cdc_read_no_polling(tmpBuf, (len<=BUF_LEN)?len:BUF_LEN) > 0)
+		{
+			totLen += len;
+			if(totLen <= BUF_LEN)
+			{
+				strcat(readBuf, tmpBuf);
+				memset(tmpBuf,0,len);
+			}
+			else
+			{
+				totLen = BUF_LEN;
+				readBuf[totLen-1] = '\r';				
+			}
+			 						
+			if(readBuf[totLen-1] == '\r' || readBuf[totLen-1] == '\n')// || readBuf[totLen-2] == '\r' || readBuf[totLen-2] == '\n')			
+			{			
+				readBuf[totLen-1]=0;
+				DataLock();
+				ProcessCommand(&command, readBuf);
+				ExecuteCommands();					
+				DataUnlock();
+				memset(readBuf,0,totLen);
+				totLen = 0;
+			}
+		}
+		GET_STACK_HWM_CDC_RX();
+	}
+}
+#else
 __attribute__((optimize("Os")))
 void Task_cdc_rx(void *parameters)
 {
 	#define PORT0  0
 	iram_size_t len = 0;
-	char readBuf[128] = {0};
-	GET_STACK_HWM_CDC_RX();	
+	static char readBuf[BUF_LEN] = {0};
+	GET_STACK_HWM_CDC_RX();
 	while(true)
 	{
+		WDT_RESET();
 		if(main_b_cdc_enable &&
-		(len = udi_cdc_multi_get_nb_received_data(PORT0)) > 0 &&
-		udi_cdc_read_no_polling(readBuf, (len<=128)?len:128) > 0 )
-		{			
-			readBuf[len]=0; //if (udi_cdc_multi_is_tx_ready(PORT0))	printf("\r\n< %s", readBuf);
+		(len = udi_cdc_multi_get_nb_received_data(PORT0)) >0 &&
+		udi_cdc_read_no_polling(readBuf, (len<=BUF_LEN)?len:BUF_LEN) > 0)
+		{
+			readBuf[len]=0;
 			DataLock();
 			ProcessCommand(&command, readBuf);
-			ExecuteCommands();					
+			ExecuteCommands();
 			DataUnlock();
 		}
 		GET_STACK_HWM_CDC_RX();
 	}
 }
-
+#endif
 
 /************************************************************************
 * \fn void Task_cdc_tx(void *parameters)
@@ -292,6 +348,7 @@ void Task_cdc_tx(void *parameters)
 	GET_STACK_HWM_CDC_TX();	
 	while(true)
 	{
+		WDT_RESET();
 		vTaskDelay(1000);			
 		if (main_b_cdc_enable && udi_cdc_multi_is_tx_ready(PORT0) && (command.tx_on || command.get_data) && command.tot_on)
 		{
@@ -375,24 +432,28 @@ void Task_cdc_tx(void *parameters)
 void Task_backlight(void *parameters)
 {
 	uint32_t cnt10 = 0, rgb = 0x00000000;
-	uint8_t bl_state = CMD_OFF;	
+	uint8_t bl_state = CMD_BL_RESET;	
 	GET_STACK_HWM_BACKLIGHT();
 	while(1)
-	{
-		vTaskDelay(500);
-										
-		if(!command.tot_on)
+	{	
+		WDT_RESET();											
+		if(!command.tot_on || bl_state == CMD_BL_RESET)
 		{
 			bl_state = CMD_BL_RESET;
-			backlight_color_show(0, 0, 0);
-		} 
+			backlight_color_show(0, 0, 0);			
+			vTaskDelay(1000);			
+		}		
 		if( bl_state != command.bl_state || rgb != command.rgb_color.rgb)
 		{
 			bl_state = command.bl_state;
-			rgb = command.rgb_color.rgb;			
+			rgb = command.rgb_color.rgb;						
 		}		
-		else continue;
-		
+		else 
+		{
+			vTaskDelay(200);
+			continue;
+		}
+					
 		if(bl_state >= CMD_BL_RESET && bl_state <= CMD_BL_DEMO && command.tot_on)
 		{			
 			uint8_t brightness = (command.rgb_color.color.brightness)&0xFF;			
@@ -451,7 +512,7 @@ void InitTask_cdc_rx_tx(void)
 	stdio_usb_init();
 	stdio_usb_enable();	
 #ifndef DEBUG_REGULATOR	
-	xTaskCreate(Task_cdc_rx, (const char*)"Task_cdc_rx", configMINIMAL_STACK_SIZE*4, NULL,configMAX_PRIORITIES-1, NULL);		
+	xTaskCreate(Task_cdc_rx, (const char*)"Task_cdc_rx", configMINIMAL_STACK_SIZE*3, NULL,configMAX_PRIORITIES-1, NULL);		
 	xTaskCreate(Task_cdc_tx, (const char*)"Task_cdc_tx", configMINIMAL_STACK_SIZE*3, NULL,configMAX_PRIORITIES-1, NULL);
 #endif	
 }
@@ -840,6 +901,10 @@ void vApplicationTickHook( void )
 ************************************************************************/
 void vApplicationMallocFailedHook (void) 
 {
+	#ifdef DEBUG
+	__BKPT();
+	#endif
+	NVIC_SystemReset();
 	while (1)
 	{
 		__BKPT();
@@ -854,6 +919,10 @@ void vApplicationMallocFailedHook (void)
 ************************************************************************/
 void vApplicationStackOverflowHook (void) 
 {
+	#ifdef DEBUG
+	__BKPT();
+	#endif
+	NVIC_SystemReset();
 	while (1)
 	{
 		__BKPT();
diff --git a/TE_Controller/src/main.h b/TE_Controller/src/main.h
index b60cc94..4a82776 100644
--- a/TE_Controller/src/main.h
+++ b/TE_Controller/src/main.h
@@ -50,6 +50,7 @@
 #define TEC_TEMP_NORM	25.0f
 #define MAX_STR_FLOAT	12
 #define T_AVG_BUF_SIZE	16
+#define BUF_LEN 64
 
 #define tErrors			255
 typedef struct measured_params{
diff --git a/TE_Controller/src/source/cmd.c b/TE_Controller/src/source/cmd.c
index 433620c..ef5eb68 100644
--- a/TE_Controller/src/source/cmd.c
+++ b/TE_Controller/src/source/cmd.c
@@ -36,7 +36,7 @@ const char sCmdTxOff[]		= "cmd_tx_off";
 
 const char sReplyOk[]		= "OK";
 const char sReplyErr[]		= "Error";
-const char delim[]			= " ,;=:\n";
+const char delim[]			= " ,;=:\r\n";
 
 extern Controller_t Controller;
 CMD_t command = 
@@ -130,7 +130,7 @@ __STATIC_INLINE bool ReadPowerValue(float *powerSetpoint)
 	}
 	return false;
 }
-
+//__attribute__((optimize("O0")))
 __STATIC_INLINE uint8_t ReadFloatValue(float *value, uint16_t valMin, uint16_t valMax, uint16_t ee_tag)
 {
 	const char *txtVal = strtok(NULL, delim);
@@ -154,7 +154,7 @@ extern arm_pid_instance_f32  pid;
 #else
 extern PID_t pid;
 #endif
-__attribute__((optimize("O3")))
+//__attribute__((optimize("O0")))
 void ProcessCommand(CMD_t *cmd, char* str)
 {
 	char *token = strtok(str, delim);
@@ -189,9 +189,7 @@ void ProcessCommand(CMD_t *cmd, char* str)
 		else if (strcasecmp(token, sCmdSetTemp) == 0)
 		{	temp = ReadFloatValue((float*)&Controller.setPoints.tempTecCamSide, TEC_TEMP_SETPOINT_MIN, TEC_TEMP_SETPOINT_MAX, EE_TEMP_SETPOINT);}
 		else if (strcasecmp(token, sCmdSetPow) == 0)
-		{	power = ReadFloatValue((float*)&Controller.setPoints.powerCoeff, TEC_POWER_COEFF_SETPOINT_MIN, TEC_POWER_COEFF_SETPOINT_MAX, EE_POWER_SETPOINT);}
-		/*else if (strcasecmp(token, sCmdSetTemp) == 0 && (temp = ReadTempValue(&Controller.setPoints.tempTecCamSide))){}
-		else if (strcasecmp(token, sCmdSetPow) == 0 && (power = ReadPowerValue(&Controller.setPoints.powerCoeff))){}*/
+		{	power = ReadFloatValue((float*)&Controller.setPoints.powerCoeff, TEC_POWER_COEFF_SETPOINT_MIN, TEC_POWER_COEFF_SETPOINT_MAX, EE_POWER_SETPOINT);}		
 		else if (strcasecmp(token, sCmdTxOff) == 0)
 			cmd->tx_on	= DISABLE;
 		else if (strcasecmp(token, sCmdTxOn) == 0)
diff --git a/TE_Controller/src/source/eeprom.c b/TE_Controller/src/source/eeprom.c
index fb651fb..919431b 100644
--- a/TE_Controller/src/source/eeprom.c
+++ b/TE_Controller/src/source/eeprom.c
@@ -59,24 +59,6 @@ enum status_code WriteEEParam(uint16_t *param_new, uint16_t param_min, uint16_t
 	return STATUS_ERR_INVALID_ARG;
 }
 
-/*enum status_code WriteEEParam(double *param, double *param_new, uint16_t param_min, uint16_t param_max, uint16_t ee_tag, size_t size)
-{
-	if(*param == *param_new) return STATUS_OK;
-	if (param_min <= *param_new && *param_new <= param_max)
-	{
-		enum status_code ret = rww_eeprom_emulator_write_buffer(ee_tag, (uint8_t*)param_new, size);
-		if( ret == STATUS_OK )
-		{
-			ret = rww_eeprom_emulator_commit_page_buffer();
-			if( ret == STATUS_OK )
-			{
-				*param = *param_new;
-			}
-		}
-		return ret;
-	}
-	return STATUS_ERR_INVALID_ARG;
-}*/
 
 #if (SAMD || SAMR21)
 void SYSCTRL_Handler(void)
diff --git a/TE_Controller/src/source/tec.c b/TE_Controller/src/source/tec.c
index 19f6e5e..7d5474c 100644
--- a/TE_Controller/src/source/tec.c
+++ b/TE_Controller/src/source/tec.c
@@ -36,12 +36,17 @@ bool ITEC_read(float	*p_Vin, float	*p_ITEC){
 	return true;
 }
 
+__attribute__((optimize("O0")))
 void TEC_L_set(bool	value){
-
 	// switch off
-	pin_set_output(PIN_LPGATE, true, 1);
+	pin_set_output(PIN_LPGATE, true, 1);	
 	pin_set_output(PIN_LNGATE, true, 0);
-	
+	__NOP();
+	__NOP();
+	__NOP();
+	__NOP();
+	__NOP();
+	__NOP();
 	if(value){
 		// L to +12
 		pin_set_output(PIN_LPGATE, true, 0);
@@ -51,7 +56,7 @@ void TEC_L_set(bool	value){
 	}
 }
 
-void	pin_set_output(uint8_t	pin, bool	output_flag, uint8_t	value){
+void pin_set_output(uint8_t	pin, bool	output_flag, uint8_t	value){
 	
 	struct port_config config_port_pin;
 	port_get_config_defaults(&config_port_pin);
@@ -65,10 +70,347 @@ void	pin_set_output(uint8_t	pin, bool	output_flag, uint8_t	value){
 	port_pin_set_config(pin, &config_port_pin);
 }
 
+static inline void pin_set_output_(uint8_t pin, bool output_flag, uint8_t value, uint8_t pull)
+{	
+	struct port_config config_port_pin;
+	port_get_config_defaults(&config_port_pin);
+	if(output_flag){
+		port_pin_set_output_level(pin, value);
+		config_port_pin.direction = PORT_PIN_DIR_OUTPUT;
+		}else{
+		config_port_pin.direction = PORT_PIN_DIR_INPUT;
+	}
+	config_port_pin.input_pull = pull;
+	port_pin_set_config(pin, &config_port_pin);
+}
+
+
+#if !defined DEBUG_TEC_SWITCHING
+static inline void ReduceCurrent(float valueOld, uint8_t chanOld)
+{	
+	if(!chanOld) return;
+	uint8_t i = 10;
+	float delta = valueOld/i;
+	float compare = valueOld;
+	while(i--)	
+	{		
+		compare -= delta;
+		tcc_set_compare_value(&tcc_instance, chanOld, PWM_GCLK_PERIOD*compare);
+		vTaskDelay(10);
+	}	
+}
+
+inline void TEC_Init(void)
+{	
+	tcc_reset(&tcc_instance);
+	pin_set_output_(PIN_LPGATE, true, 1, PORT_PIN_PULL_UP);		
+	pin_set_output_(PIN_SPGATE, true, 1, PORT_PIN_PULL_UP);		
+	pin_set_output_(PIN_LNGATE, true, 0, PORT_PIN_PULL_DOWN);	
+	pin_set_output_(PIN_SNGATE, true, 0, PORT_PIN_PULL_DOWN);		
+}
+__attribute__((optimize("O0")))
+void	TEC_set_level(float	value)
+{	
+	static float valueOld = 0;
+	static uint8_t chanOld = 0;
+	
+	if(fpclassify(value) == FP_ZERO || fpclassify(value) == FP_NAN)
+	{
+		ReduceCurrent(valueOld, chanOld);		
+		TEC_Init();
+		valueOld = 0;
+		chanOld = 0;			
+	}
+	else
+	{			
+		if(value > 0.0)
+		{			
+			if(chanOld != PWM_CHANNEL_SNGATE)
+			{
+				ReduceCurrent(valueOld, chanOld);				
+				chanOld = PWM_CHANNEL_SNGATE;				
+				tcc_disable(&tcc_instance);//tcc_reset(&tcc_instance);
+				pin_set_output_(PIN_SPGATE, true, 1, PORT_PIN_PULL_UP);
+				pin_set_output_(PIN_LNGATE, true, 0, PORT_PIN_PULL_DOWN);									
+								
+				pin_set_output_(PIN_LPGATE, true, 0, PORT_PIN_PULL_DOWN);// to +12				
+				pin_set_output_(PIN_SNGATE, false, 0, PORT_PIN_PULL_NONE);
+				
+				struct tcc_config config_tcc;
+				tcc_get_config_defaults(&config_tcc, CONF_PWM_MODULE);
+				config_tcc.counter.clock_prescaler	= TCC_CLOCK_PRESCALER_DIV1;
+				config_tcc.compare.wave_generation	= TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
+				config_tcc.counter.period			= PWM_GCLK_PERIOD;
+						
+				config_tcc.pins.wave_out_pin[PWM_PIN_OUTPUT_SNGATE] = PIN_PA17F_TCC0_WO7;
+				config_tcc.pins.wave_out_pin_mux[PWM_PIN_OUTPUT_SNGATE] = MUX_PA17F_TCC0_WO7;
+				config_tcc.compare.match[PWM_CHANNEL_SNGATE] = PWM_GCLK_PERIOD*value;
+								
+				config_tcc.pins.enable_wave_out_pin[PWM_PIN_OUTPUT_SNGATE] = true;
+				tcc_init(&tcc_instance, CONF_PWM_MODULE, &config_tcc);
+				tcc_enable(&tcc_instance);
+			}
+			else
+			{				
+				tcc_set_compare_value(&tcc_instance, PWM_CHANNEL_SNGATE, PWM_GCLK_PERIOD*value);
+			}				
+		}
+		else
+		{
+			if(chanOld != PWM_CHANNEL_SPGATE )
+			{	
+				ReduceCurrent(valueOld, chanOld);			
+				chanOld = PWM_CHANNEL_SPGATE;
+								
+				tcc_disable(&tcc_instance);//tcc_reset(&tcc_instance);
+				pin_set_output_(PIN_LPGATE, true, 1, PORT_PIN_PULL_UP);								
+				pin_set_output_(PIN_SNGATE, true, 0, PORT_PIN_PULL_DOWN);				
+							
+				pin_set_output_(PIN_LNGATE, true, 1, PORT_PIN_PULL_UP); // to GND
+				pin_set_output_(PIN_SPGATE, false, 1, PORT_PIN_PULL_NONE);
+				
+				struct tcc_config config_tcc;
+				tcc_get_config_defaults(&config_tcc, CONF_PWM_MODULE);				
+				config_tcc.counter.clock_prescaler	= TCC_CLOCK_PRESCALER_DIV1;
+				config_tcc.compare.wave_generation	= TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
+				config_tcc.counter.period			= PWM_GCLK_PERIOD;
+											
+				config_tcc.pins.wave_out_pin[PWM_PIN_OUTPUT_SPGATE] = PIN_PA16F_TCC0_WO6;
+				config_tcc.pins.wave_out_pin_mux[PWM_PIN_OUTPUT_SPGATE] = MUX_PA16F_TCC0_WO6;
+				config_tcc.compare.match[PWM_CHANNEL_SPGATE] = PWM_GCLK_PERIOD*value*(-1);				
+				config_tcc.wave_ext.invert[PWM_PIN_OUTPUT_SPGATE]=true;
+				
+				config_tcc.pins.enable_wave_out_pin[PWM_PIN_OUTPUT_SPGATE] = true;
+				tcc_init(&tcc_instance, CONF_PWM_MODULE, &config_tcc);
+				tcc_enable(&tcc_instance);
+			}
+			else 
+			{				
+				tcc_set_compare_value(&tcc_instance, PWM_CHANNEL_SPGATE, PWM_GCLK_PERIOD*value*(-1));
+			}
+						
+		}		
+		valueOld = value;
+	}
+}
+#elif defined DEBUG_TEC_SWITCHING_
+__attribute__((optimize("O0")))
+void	TEC_set_level(float	value)
+{
+	static float valueOld = 0;
+	static uint8_t chanOld = 0;
+	if(fpclassify(value) == FP_ZERO || fpclassify(value) == FP_NAN)
+	{
+		//tcc_reset(&tcc_instance);
+		TEC_Init();
+		valueOld = 0;
+		chanOld = 0;
+	}
+	else
+	{
+		struct tcc_config config_tcc;
+		if (fpclassify(valueOld) == FP_ZERO)
+		{
+			tcc_get_config_defaults(&config_tcc, CONF_PWM_MODULE);
+			config_tcc.counter.clock_prescaler	= TCC_CLOCK_PRESCALER_DIV1;
+			config_tcc.compare.wave_generation	= TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
+			config_tcc.counter.period			= PWM_GCLK_PERIOD;
+		}
+		
+		uint8_t	pin_output, chan;
+		uint32_t compare;
+		if(value > 0.0)//if(fpclassify(value) > FP_ZERO)
+		{
+			chan=3;
+			if(chanOld != 3)//if(fpclassify(valueOld) <= FP_ZERO)
+			{
+				ReduceCurrent(valueOld, chanOld, -1);
+				//tcc_reset(&tcc_instance);
+				TEC_Init();
+				//port_pin_set_output_level(PIN_LNGATE, 0);
+				//port_pin_set_output_level(PIN_SPGATE, 1);
+				//pin_set_output_(PIN_SPGATE, true, 1, PORT_PIN_PULL_NONE);// PORT_PIN_PULL_UP);
+				//pin_set_output_(PIN_LNGATE, true, 0, PORT_PIN_PULL_NONE);// PORT_PIN_PULL_DOWN);
+				
+				//port_pin_set_output_level(PIN_LPGATE, 0);
+				//port_pin_set_output_level(PIN_SNGATE, 1);
+				pin_set_output_(PIN_LPGATE, true, 0, PORT_PIN_PULL_DOWN);// to +12
+				pin_set_output_(PIN_SNGATE, false, 0, PORT_PIN_PULL_NONE);//pin_set_output(PIN_SNGATE, false, 1);
+				
+				tcc_get_config_defaults(&config_tcc, CONF_PWM_MODULE);
+				config_tcc.counter.clock_prescaler	= TCC_CLOCK_PRESCALER_DIV1;
+				config_tcc.compare.wave_generation	= TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
+				config_tcc.counter.period			= PWM_GCLK_PERIOD;
+				
+				pin_output=7;
+				config_tcc.pins.wave_out_pin[pin_output] = PIN_PA17F_TCC0_WO7;
+				config_tcc.pins.wave_out_pin_mux[pin_output] = MUX_PA17F_TCC0_WO7;
+				config_tcc.compare.match[chan] = PWM_GCLK_PERIOD*value;
+				
+				config_tcc.pins.enable_wave_out_pin[pin_output] = true;
+				tcc_init(&tcc_instance, CONF_PWM_MODULE, &config_tcc);
+				tcc_enable(&tcc_instance);
+			}
+			else
+			{
+				compare = PWM_GCLK_PERIOD*value;
+				tcc_set_compare_value(&tcc_instance, chan, compare);
+			}
+		}
+		else// if(value < 0.0)//(fpclassify(value) < FP_ZERO)
+		{
+			chan=2;
+			if(chanOld !=2 )//if(fpclassify(valueOld) >= FP_ZERO)
+			{
+				ReduceCurrent(valueOld, chanOld, 1);
+				//tcc_reset(&tcc_instance);
+				TEC_Init();
+				//port_pin_set_output_level(PIN_LPGATE, 1);
+				//port_pin_set_output_level(PIN_SNGATE, 0);
+				//pin_set_output_(PIN_SNGATE, true, 0, PORT_PIN_PULL_NONE);// PORT_PIN_PULL_DOWN);
+				//pin_set_output_(PIN_LPGATE, true, 1, PORT_PIN_PULL_NONE);// PORT_PIN_PULL_UP);
+				
+				//port_pin_set_output_level(PIN_LNGATE, 1);
+				//port_pin_set_output_level(PIN_SPGATE, 0);
+				pin_set_output_(PIN_LNGATE, true, 1, PORT_PIN_PULL_UP); // to GND
+				pin_set_output_(PIN_SPGATE, false, 1, PORT_PIN_PULL_NONE);//pin_set_output(PIN_SPGATE, false, 0);
+				
+				tcc_get_config_defaults(&config_tcc, CONF_PWM_MODULE);
+				config_tcc.counter.clock_prescaler	= TCC_CLOCK_PRESCALER_DIV1;
+				config_tcc.compare.wave_generation	= TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
+				config_tcc.counter.period			= PWM_GCLK_PERIOD;
+				
+				pin_output=6;
+				config_tcc.pins.wave_out_pin[pin_output] = PIN_PA16F_TCC0_WO6;
+				config_tcc.pins.wave_out_pin_mux[pin_output] = MUX_PA16F_TCC0_WO6;
+				config_tcc.compare.match[chan] = PWM_GCLK_PERIOD*value*(-1);
+				config_tcc.wave_ext.invert[pin_output]=true;
+				
+				config_tcc.pins.enable_wave_out_pin[pin_output] = true;
+				tcc_init(&tcc_instance, CONF_PWM_MODULE, &config_tcc);
+				tcc_enable(&tcc_instance);
+			}
+			else
+			{
+				compare = PWM_GCLK_PERIOD*value*(-1);
+				tcc_set_compare_value(&tcc_instance, chan, compare);
+			}
+			
+		}
+		chanOld = chan;
+		valueOld = value;
+	}
+}
+#elif defined DEBUG_TEC_SWITCHING
+inline void TEC_Init(void)
+{
+	tcc_reset(&tcc_instance);
+	pin_set_output_(PIN_SPGATE, true, 1, PORT_PIN_PULL_UP);
+	pin_set_output_(PIN_SNGATE, true, 0, PORT_PIN_PULL_DOWN);
+	pin_set_output_(PIN_LPGATE, true, 1, PORT_PIN_PULL_UP);
+	pin_set_output_(PIN_LNGATE, true, 0, PORT_PIN_PULL_DOWN);
+}
+__attribute__((optimize("O0")))
 // Range from -1 to 1
 void	TEC_set_level(float	value)
 {
+		
+	/*pin_set_output(PIN_SPGATE, true, 1);
+	pin_set_output(PIN_SNGATE, true, 0);
+	pin_set_output(PIN_LPGATE, true, 1);
+	pin_set_output(PIN_LNGATE, true, 0);*/
+	/*port_pin_set_output_level(PIN_LPGATE, 1);
+	port_pin_set_output_level(PIN_LNGATE, 0);	
+	port_pin_set_output_level(PIN_SPGATE, 1);	
+	port_pin_set_output_level(PIN_SNGATE, 0);*/
+	//delay for 120ns = 20ns*6
+	/*TEC_Init();
+	__NOP();
+	__NOP();
+	__NOP();
+	__NOP();
+	__NOP();
+	__NOP();*/
+	
+	if(fpclassify(value) == FP_ZERO || fpclassify(value) == FP_NAN)
+	{
+		TEC_Init();
+		/*pin_set_output(PIN_SPGATE, true, 1);
+		pin_set_output(PIN_SNGATE, true, 0);
+		pin_set_output(PIN_LPGATE, true, 1);
+		pin_set_output(PIN_LNGATE, true, 0);*/		
+	}
+	else
+	{				
+		struct tcc_config config_tcc;
+		tcc_get_config_defaults(&config_tcc, CONF_PWM_MODULE);
+		config_tcc.counter.clock_prescaler	= TCC_CLOCK_PRESCALER_DIV1;				
+		config_tcc.compare.wave_generation	= TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
+		config_tcc.counter.period			= PWM_GCLK_PERIOD;
+				
+		tcc_reset(&tcc_instance);
+		
+		uint8_t	pin_output, chan;
+		if(value > 0.0)
+		{
+			//port_pin_set_output_level(PIN_LNGATE, 0);
+			//port_pin_set_output_level(PIN_SPGATE, 1);
+			pin_set_output_(PIN_SPGATE, true, 1, PORT_PIN_PULL_UP);						
+			pin_set_output_(PIN_LNGATE, true, 0, PORT_PIN_PULL_DOWN);
+			__NOP();
+			__NOP();
+			__NOP();
+			__NOP();
+			__NOP();
+			__NOP();						
+			port_pin_set_output_level(PIN_LPGATE, 0);//pin_set_output(PIN_LPGATE, true, 0);// to +12			
+			port_pin_set_output_level(PIN_SNGATE, 1);//pin_set_output(PIN_SNGATE, true, 1);//pin_set_output(PIN_SNGATE, false, 1);
+			pin_output=7;
+			chan=3;
+			config_tcc.pins.wave_out_pin[pin_output] = PIN_PA17F_TCC0_WO7;
+			config_tcc.pins.wave_out_pin_mux[pin_output] = MUX_PA17F_TCC0_WO7;
+			config_tcc.compare.match[chan] = PWM_GCLK_PERIOD*value;
+		}
+		else
+		{	
+			//port_pin_set_output_level(PIN_LPGATE, 1);			
+			//port_pin_set_output_level(PIN_SNGATE, 0);			
+			pin_set_output_(PIN_SNGATE, true, 0, PORT_PIN_PULL_DOWN);
+			pin_set_output_(PIN_LPGATE, true, 1, PORT_PIN_PULL_UP);
+			__NOP();
+			__NOP();
+			__NOP();
+			__NOP();
+			__NOP();
+			__NOP();							
+			port_pin_set_output_level(PIN_LNGATE, 1);//pin_set_output(PIN_LNGATE, true, 1); // to GND
+			port_pin_set_output_level(PIN_SPGATE, 0);//pin_set_output(PIN_SPGATE, true, 0);//pin_set_output(PIN_SPGATE, false, 0);			
+			pin_output=6;
+			chan=2;
+			config_tcc.pins.wave_out_pin[pin_output] = PIN_PA16F_TCC0_WO6;
+			config_tcc.pins.wave_out_pin_mux[pin_output] = MUX_PA16F_TCC0_WO6;
+			config_tcc.compare.match[chan] = PWM_GCLK_PERIOD*value*(-1);
+			config_tcc.wave_ext.invert[pin_output]=true;
+		}
+		config_tcc.pins.enable_wave_out_pin[pin_output] = true;
+		tcc_init(&tcc_instance, CONF_PWM_MODULE, &config_tcc);
+		tcc_enable(&tcc_instance);
+	}
+}
+
+#else
+inline void TEC_Init(void)
+{	
 	tcc_reset(&tcc_instance);
+	pin_set_output_(PIN_LPGATE, true, 1, PORT_PIN_PULL_UP);		
+	pin_set_output_(PIN_SPGATE, true, 1, PORT_PIN_PULL_UP);		
+	pin_set_output_(PIN_LNGATE, true, 0, PORT_PIN_PULL_DOWN);	
+	pin_set_output_(PIN_SNGATE, true, 0, PORT_PIN_PULL_DOWN);		
+}
+__attribute__((optimize("O0")))
+void	TEC_set_level(float	value)
+{
+	tcc_reset(&tcc_instance);	
 	if(fpclassify(value) == FP_ZERO || fpclassify(value) == FP_NAN)
 	{		
 		pin_set_output(PIN_SPGATE, true, 1);
@@ -89,24 +431,24 @@ void	TEC_set_level(float	value)
 		config_tcc.counter.clock_prescaler	= TCC_CLOCK_PRESCALER_DIV1;				
 		config_tcc.compare.wave_generation	= TCC_WAVE_GENERATION_SINGLE_SLOPE_PWM;
 		config_tcc.counter.period			= PWM_GCLK_PERIOD;
+				
 		
 		uint8_t	pin_output, chan;
 		if(value > 0.0)
 		{
 			TEC_L_set(true);	// to +12
-			pin_set_output(PIN_SPGATE, true, 1);
+			pin_set_output(PIN_SPGATE, true, 1);			
 			pin_set_output(PIN_SNGATE, false, 0);
 			pin_output=7;
 			chan=3;
 			config_tcc.pins.wave_out_pin[pin_output] = PIN_PA17F_TCC0_WO7;
 			config_tcc.pins.wave_out_pin_mux[pin_output] = MUX_PA17F_TCC0_WO7;
-
 			config_tcc.compare.match[chan] = PWM_GCLK_PERIOD*value;
 		}
 		else
 		{
 			TEC_L_set(false);	// to GND
-			pin_set_output(PIN_SPGATE, false, 0);
+			pin_set_output(PIN_SPGATE, false, 0);			
 			pin_set_output(PIN_SNGATE, true, 0);
 			pin_output=6;
 			chan=2;
@@ -120,6 +462,7 @@ void	TEC_set_level(float	value)
 		tcc_enable(&tcc_instance);
 	}
 }
+#endif
 #ifdef USE_ADN8831
 extern struct dac_module dac_instance;
 void	TEC_set_TEMPSET_volt(float	value)
diff --git a/desktop.ini b/desktop.ini
new file mode 100644
index 0000000..d957fd1
--- /dev/null
+++ b/desktop.ini
@@ -0,0 +1,4 @@
+[ViewState]
+Mode=
+Vid=
+FolderType=Generic