Enabled Ethernet MAC and PHY
This commit is contained in:
parent
b3e7d2c947
commit
d79ae7abf4
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@ -364,7 +364,7 @@ void prvProcessNetworkDownEvent( void )
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else
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else
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{
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{
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/* Set remaining time to 0 so it will become active immediately. */
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/* Set remaining time to 0 so it will become active immediately. */
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#if ipconfigUSE_DHCP == 1
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#if (ipconfigUSE_DHCP == 1)
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{
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{
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/* The network is not up until DHCP has completed. */
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/* The network is not up until DHCP has completed. */
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vDHCPProcess( pdTRUE, eInitialWait );
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vDHCPProcess( pdTRUE, eInitialWait );
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@ -1439,10 +1439,14 @@
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#include "NetworkBufferManagement.h"
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#include "NetworkBufferManagement.h"
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#include "NetworkInterface.h"
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#include "NetworkInterface.h"
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//#include "Driver_ETH.h"
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#include "Driver_ETH.h"
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#include "Driver_ETH_MAC.h"
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#include "Driver_ETH_MAC.h"
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#include "Driver_ETH_PHY.h"
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#include "Driver_ETH_PHY.h"
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#include "gd32f10x_enet.h"
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#include "gd32f10x_enet.h"
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//#include "RTE_Components.h"
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//#ifdef RTE_Drivers_PHY_DP83848C /* Driver PHY DP83848C */
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//#endif
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static void receiveHandlerTask( void *pvParameters );
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static void receiveHandlerTask( void *pvParameters );
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static TaskHandle_t receiveHandler = NULL;
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static TaskHandle_t receiveHandler = NULL;
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@ -1453,6 +1457,9 @@ static ARM_ETH_MAC_CAPABILITIES capabilities;
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//#define Driver_ETH_MAC0 ARM_Driver_ETH_MAC_(0)
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//#define Driver_ETH_MAC0 ARM_Driver_ETH_MAC_(0)
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//extern ARM_DRIVER_ETH_MAC Driver_ETH_MAC0;
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//extern ARM_DRIVER_ETH_MAC Driver_ETH_MAC0;
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extern ARM_DRIVER_ETH_PHY ARM_Driver_ETH_PHY_(0);
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#define Driver_ETH_PHY0 ARM_Driver_ETH_PHY_(0)
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/**
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/**
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\fn ARM_DRIVER_VERSION ARM_ETH_MAC_GetVersion (void)
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\fn ARM_DRIVER_VERSION ARM_ETH_MAC_GetVersion (void)
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\brief Get driver version.
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\brief Get driver version.
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@ -1482,7 +1489,7 @@ ARM_ETH_MAC_CAPABILITIES ARM_ETH_MAC_GetCapabilities (void)
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1, ///< 1 = UDP payload checksum generated on transmit
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1, ///< 1 = UDP payload checksum generated on transmit
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1, ///< 1 = TCP payload checksum generated on transmit
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1, ///< 1 = TCP payload checksum generated on transmit
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1, ///< 1 = ICMP payload checksum generated on transmit
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1, ///< 1 = ICMP payload checksum generated on transmit
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0, ///< 0, 1, 2, 3, Ethernet Media Interface type
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ARM_ETH_INTERFACE_RMII, ///< 0, 1, 2, 3, Ethernet Media Interface type
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1, ///< 1 = driver provides initial valid MAC address
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1, ///< 1 = driver provides initial valid MAC address
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1, ///< 1 = callback event \ref ARM_ETH_MAC_EVENT_RX_FRAME generated
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1, ///< 1 = callback event \ref ARM_ETH_MAC_EVENT_RX_FRAME generated
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1, ///< 1 = callback event \ref ARM_ETH_MAC_EVENT_TX_FRAME generated
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1, ///< 1 = callback event \ref ARM_ETH_MAC_EVENT_TX_FRAME generated
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@ -1502,7 +1509,9 @@ ARM_ETH_MAC_CAPABILITIES ARM_ETH_MAC_GetCapabilities (void)
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int32_t ARM_ETH_MAC_Initialize (ARM_ETH_MAC_SignalEvent_t cb_event)
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int32_t ARM_ETH_MAC_Initialize (ARM_ETH_MAC_SignalEvent_t cb_event)
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{
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{
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ErrStatus xResult = enet_init(ENET_AUTO_NEGOTIATION, ENET_AUTOCHECKSUM_DROP_FAILFRAMES, ENET_RECEIVEALL);
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ErrStatus xResult = ARM_DRIVER_ERROR;
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if (SUCCESS == enet_init(ENET_AUTO_NEGOTIATION, ENET_AUTOCHECKSUM_DROP_FAILFRAMES, ENET_RECEIVEALL))
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xResult = ARM_DRIVER_OK;
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//enet_ptp_start(int32_t updatemethod, uint32_t init_sec, uint32_t init_subsec, uint32_t carry_cfg, uint32_t accuracy_cfg)
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//enet_ptp_start(int32_t updatemethod, uint32_t init_sec, uint32_t init_subsec, uint32_t carry_cfg, uint32_t accuracy_cfg)
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return xResult;
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return xResult;
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@ -1520,7 +1529,7 @@ int32_t ARM_ETH_MAC_Initialize (ARM_ETH_MAC_SignalEvent_t cb_event)
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int32_t ARM_ETH_MAC_Uninitialize (void)
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int32_t ARM_ETH_MAC_Uninitialize (void)
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{
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{
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enet_deinit();
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enet_deinit();
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return pdTRUE;
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return ARM_DRIVER_OK;
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}
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}
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/**
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/**
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@ -1530,8 +1539,9 @@ int32_t ARM_ETH_MAC_Uninitialize (void)
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\return \ref execution_status
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\return \ref execution_status
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*/
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*/
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int32_t ARM_ETH_MAC_PowerControl (ARM_POWER_STATE state)
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int32_t ARM_ETH_MAC_PowerControl (ARM_POWER_STATE state)
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{
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{
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return pdTRUE;
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return ARM_DRIVER_OK;
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}
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}
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/**
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/**
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\fn int32_t ARM_ETH_MAC_GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr)
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\fn int32_t ARM_ETH_MAC_GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr)
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@ -1544,9 +1554,9 @@ int32_t ARM_ETH_MAC_GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr)
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if (ptr_addr != NULL)
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if (ptr_addr != NULL)
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{
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{
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enet_mac_address_get(ENET_MAC_ADDRESS0, (uint8_t*)ptr_addr->b);
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enet_mac_address_get(ENET_MAC_ADDRESS0, (uint8_t*)ptr_addr->b);
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return pdPASS;
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return ARM_DRIVER_OK;
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}
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}
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else return pdFAIL;
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else return ARM_DRIVER_ERROR_PARAMETER;
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}
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}
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/**
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/**
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@ -1560,9 +1570,9 @@ int32_t ARM_ETH_MAC_SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr)
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if (ptr_addr != NULL)
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if (ptr_addr != NULL)
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{
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{
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enet_mac_address_set(ENET_MAC_ADDRESS0, (uint8_t*)ptr_addr->b);
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enet_mac_address_set(ENET_MAC_ADDRESS0, (uint8_t*)ptr_addr->b);
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return pdPASS;
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return ARM_DRIVER_OK;
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}
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}
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else return pdFAIL;
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else return ARM_DRIVER_ERROR_PARAMETER;
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}
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}
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/**
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/**
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@ -1575,14 +1585,17 @@ int32_t ARM_ETH_MAC_SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr)
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*/
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*/
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int32_t ARM_ETH_MAC_SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr)
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int32_t ARM_ETH_MAC_SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr)
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{
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{
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#ifdef DEBUG
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printf("ARM_ETH_MAC_SetAddressFilter\n");
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__asm volatile("BKPT #0\n") ;
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#endif
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE0, ENET_ADDRESS_FILTER_SA);
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE0, ENET_ADDRESS_FILTER_SA);
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE1, ENET_ADDRESS_FILTER_SA);
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE1, ENET_ADDRESS_FILTER_SA);
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE2, ENET_ADDRESS_FILTER_SA);
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE2, ENET_ADDRESS_FILTER_SA);
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE3, ENET_ADDRESS_FILTER_SA);
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE3, ENET_ADDRESS_FILTER_SA);
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE4, ENET_ADDRESS_FILTER_SA);
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE4, ENET_ADDRESS_FILTER_SA);
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE5, ENET_ADDRESS_FILTER_SA);
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enet_address_filter_config(ENET_MAC_ADDRESS0, ENET_ADDRESS_MASK_BYTE5, ENET_ADDRESS_FILTER_SA);
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return pdTRUE;
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return ARM_DRIVER_OK;
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}
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}
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/**
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/**
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@ -1595,10 +1608,18 @@ int32_t ARM_ETH_MAC_SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t
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*/
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*/
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int32_t ARM_ETH_MAC_SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags)
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int32_t ARM_ETH_MAC_SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags)
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{
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{
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#ifdef DEBUG
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printf("ARM_ETH_MAC_SendFrame\n");
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// __asm volatile("BKPT #0\n") ;
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#endif
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if (frame != NULL & len > 0)
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if (frame != NULL & len > 0)
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return enet_frame_transmit((uint8_t*)frame, len);
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{
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else
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if (SUCCESS == enet_frame_transmit((uint8_t*)frame, len))
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return pdFAIL;
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return ARM_DRIVER_OK;
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else
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return ARM_DRIVER_ERROR;
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}else
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return ARM_DRIVER_ERROR_PARAMETER;
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}
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}
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/**
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/**
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@ -1612,10 +1633,18 @@ int32_t ARM_ETH_MAC_SendFrame (const uint8_t *frame, uint32_t len, uint32_t flag
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*/
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*/
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int32_t ARM_ETH_MAC_ReadFrame (uint8_t *frame, uint32_t len)
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int32_t ARM_ETH_MAC_ReadFrame (uint8_t *frame, uint32_t len)
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{
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{
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#ifdef DEBUG
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printf("ARM_ETH_MAC_ReadFrame\n");
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// __asm volatile("BKPT #0\n") ;
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#endif
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if (frame != NULL & len > 0)
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if (frame != NULL & len > 0)
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return enet_frame_receive(frame, len);
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{
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else
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if (SUCCESS == enet_frame_receive(frame, len))
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return pdFAIL;
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return ARM_DRIVER_OK;
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else
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return ARM_DRIVER_ERROR;
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}else
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return ARM_DRIVER_ERROR_PARAMETER;
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}
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}
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/**
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/**
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@ -1636,12 +1665,16 @@ uint32_t ARM_ETH_MAC_GetRxFrameSize (void)
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*/
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*/
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int32_t ARM_ETH_MAC_GetRxFrameTime (ARM_ETH_MAC_TIME *time)
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int32_t ARM_ETH_MAC_GetRxFrameTime (ARM_ETH_MAC_TIME *time)
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{
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{
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#ifdef DEBUG
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printf("ARM_ETH_MAC_GetRxFrameTime\n");
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// __asm volatile("BKPT #0\n") ;
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#endif
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//if ENET_RXTX_TIMESTAMP bit set in ENET_PTP_TSCTL register (enet_ptp_start(int32_t updatemethod, uint32_t init_sec, uint32_t init_subsec, uint32_t carry_cfg, uint32_t accuracy_cfg);)
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//if ENET_RXTX_TIMESTAMP bit set in ENET_PTP_TSCTL register (enet_ptp_start(int32_t updatemethod, uint32_t init_sec, uint32_t init_subsec, uint32_t carry_cfg, uint32_t accuracy_cfg);)
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enet_ptp_systime_struct systime_struct;
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enet_ptp_systime_struct systime_struct;
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enet_ptp_system_time_get(&systime_struct);
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enet_ptp_system_time_get(&systime_struct);
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time->sec = systime_struct.second;
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time->sec = systime_struct.second;
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time->ns = systime_struct.nanosecond;
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time->ns = systime_struct.nanosecond;
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return pdPASS;
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return ARM_DRIVER_OK;
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}
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}
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/**
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/**
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@ -1652,12 +1685,16 @@ int32_t ARM_ETH_MAC_GetRxFrameTime (ARM_ETH_MAC_TIME *time)
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*/
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*/
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int32_t ARM_ETH_MAC_GetTxFrameTime (ARM_ETH_MAC_TIME *time)
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int32_t ARM_ETH_MAC_GetTxFrameTime (ARM_ETH_MAC_TIME *time)
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{
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{
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#ifdef DEBUG
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printf("ARM_ETH_MAC_GetTxFrameTime\n");
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// __asm volatile("BKPT #0\n") ;
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#endif
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//if ENET_RXTX_TIMESTAMP bit set in ENET_PTP_TSCTL register (enet_ptp_timestamp_function_config(ENET_PTP_SYSTIME_INIT);)
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//if ENET_RXTX_TIMESTAMP bit set in ENET_PTP_TSCTL register (enet_ptp_timestamp_function_config(ENET_PTP_SYSTIME_INIT);)
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enet_ptp_systime_struct systime_struct;
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enet_ptp_systime_struct systime_struct;
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enet_ptp_system_time_get(&systime_struct);
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enet_ptp_system_time_get(&systime_struct);
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time->sec = systime_struct.second;
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time->sec = systime_struct.second;
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time->ns = systime_struct.nanosecond;
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time->ns = systime_struct.nanosecond;
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return pdPASS;
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return ARM_DRIVER_OK;
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}
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}
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/**
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/**
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@ -1669,7 +1706,18 @@ int32_t ARM_ETH_MAC_GetTxFrameTime (ARM_ETH_MAC_TIME *time)
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*/
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*/
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int32_t ARM_ETH_MAC_Control (uint32_t control, uint32_t arg)
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int32_t ARM_ETH_MAC_Control (uint32_t control, uint32_t arg)
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{
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{
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return pdPASS;
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#ifdef DEBUG
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printf("ARM_ETH_MAC_Control\n");
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// __asm volatile("BKPT #0\n") ;
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#endif
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if((control >= 0) & (arg >= 0))
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{
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if(SUCCESS == enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, control, (uint16_t*)&arg))
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return ARM_DRIVER_OK;
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else
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return ARM_DRIVER_ERROR;
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}else
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return ARM_DRIVER_ERROR_PARAMETER;
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}
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}
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/**
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/**
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@ -1681,7 +1729,18 @@ int32_t ARM_ETH_MAC_Control (uint32_t control, uint32_t arg)
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*/
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*/
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int32_t ARM_ETH_MAC_ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time)
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int32_t ARM_ETH_MAC_ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time)
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{
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{
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return pdPASS;
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#ifdef DEBUG
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printf("ARM_ETH_MAC_ControlTimer\n");
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// __asm volatile("BKPT #0\n") ;
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#endif
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if((control >= 0) & (time != NULL))
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{
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if(SUCCESS == enet_phy_write_read(ENET_PHY_WRITE, PHY_ADDRESS, control, (uint16_t*)time))
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return ARM_DRIVER_OK;
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else
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return ARM_DRIVER_ERROR;
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}else
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return ARM_DRIVER_ERROR_PARAMETER;
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}
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}
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/**
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/**
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@ -1694,7 +1753,22 @@ int32_t ARM_ETH_MAC_ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time)
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*/
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*/
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int32_t ARM_ETH_MAC_PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
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int32_t ARM_ETH_MAC_PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
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{
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{
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return pdPASS;
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if((phy_addr >= 0) & (reg_addr >= 0x00) & data >= 0x0000)
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{
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if(SUCCESS == enet_phy_write_read(ENET_PHY_READ, phy_addr, reg_addr, data))
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return ARM_DRIVER_OK;
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else
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{
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#ifdef DEBUG
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printf("ARM_ETH_MAC_PHY_Read_ERROR\n");
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#endif
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return ARM_DRIVER_ERROR;
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}
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}else
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#ifdef DEBUG
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printf("ARM_ETH_MAC_PHY_Read_ERROR_PARAMETER\n");
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#endif
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return ARM_DRIVER_ERROR_PARAMETER;
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}
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}
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/**
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/**
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@ -1707,7 +1781,22 @@ int32_t ARM_ETH_MAC_PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data
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*/
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*/
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int32_t ARM_ETH_MAC_PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
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int32_t ARM_ETH_MAC_PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
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{
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{
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return pdPASS;
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if((phy_addr >= 0) & (reg_addr >= 0x00) & data >= 0x0000)
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{
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if(SUCCESS == enet_phy_write_read(ENET_PHY_WRITE, phy_addr, reg_addr, &data))
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return ARM_DRIVER_OK;
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else
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{
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#ifdef DEBUG
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printf("ARM_ETH_MAC_PHY_Write_ERROR\n");
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#endif
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return ARM_DRIVER_ERROR;
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}
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}else
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#ifdef DEBUG
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printf("ARM_ETH_MAC_PHY_Write_ERROR_PARAMETER\n");
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#endif
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return ARM_DRIVER_ERROR_PARAMETER;
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}
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}
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/**
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/**
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|
|
@ -1715,7 +1804,9 @@ int32_t ARM_ETH_MAC_PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data
|
||||||
\brief Callback function that signals a Ethernet Event.
|
\brief Callback function that signals a Ethernet Event.
|
||||||
\param[in] event event notification mask
|
\param[in] event event notification mask
|
||||||
\return none
|
\return none
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
ARM_DRIVER_ETH_MAC Driver_ETH_MAC0 = {ARM_ETH_MAC_GetVersion,
|
ARM_DRIVER_ETH_MAC Driver_ETH_MAC0 = {ARM_ETH_MAC_GetVersion,
|
||||||
ARM_ETH_MAC_GetCapabilities,
|
ARM_ETH_MAC_GetCapabilities,
|
||||||
ARM_ETH_MAC_Initialize,
|
ARM_ETH_MAC_Initialize,
|
||||||
|
|
@ -1733,12 +1824,10 @@ ARM_DRIVER_ETH_MAC Driver_ETH_MAC0 = {ARM_ETH_MAC_GetVersion,
|
||||||
ARM_ETH_MAC_Control,
|
ARM_ETH_MAC_Control,
|
||||||
ARM_ETH_MAC_PHY_Read,
|
ARM_ETH_MAC_PHY_Read,
|
||||||
ARM_ETH_MAC_PHY_Write};
|
ARM_ETH_MAC_PHY_Write};
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
extern ARM_DRIVER_ETH_PHY ARM_Driver_ETH_PHY_(0);
|
|
||||||
#define Driver_ETH_PHY0 ARM_Driver_ETH_PHY_(0)
|
|
||||||
|
|
||||||
/*callback function for ARM_ETH_MAC_SignalEvent_t*/
|
/*callback function for ARM_ETH_MAC_SignalEvent_t*/
|
||||||
void ethernet_mac_notify (uint32_t event) {
|
void ethernet_mac_notify (uint32_t event) {
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,305 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2013-2018 Arm Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||||
|
* not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||||
|
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*
|
||||||
|
* -----------------------------------------------------------------------
|
||||||
|
*
|
||||||
|
* $Date: 25. May 2018
|
||||||
|
* $Revision: V6.2
|
||||||
|
*
|
||||||
|
* Driver: Driver_ETH_PHYn (default: Driver_ETH_PHY0)
|
||||||
|
* Project: Ethernet Physical Layer Transceiver (PHY)
|
||||||
|
* Driver for DP83848C
|
||||||
|
* -----------------------------------------------------------------------
|
||||||
|
* Use the following configuration settings in the middleware component
|
||||||
|
* to connect to this driver.
|
||||||
|
*
|
||||||
|
* Configuration Setting Value
|
||||||
|
* --------------------- -----
|
||||||
|
* Connect to hardware via Driver_ETH_PHY# = n (default: 0)
|
||||||
|
* -------------------------------------------------------------------- */
|
||||||
|
|
||||||
|
/* History:
|
||||||
|
* Version 6.2
|
||||||
|
* Updated for ARM compiler 6
|
||||||
|
* Version 6.1
|
||||||
|
* Added driver flow control flags
|
||||||
|
* Version 6.0
|
||||||
|
* Based on API V2.00
|
||||||
|
* Version 5.1
|
||||||
|
* Based on API V1.10 (namespace prefix ARM_ added)
|
||||||
|
* Version 5.0
|
||||||
|
* Initial release
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "PHY_DP83848C.h"
|
||||||
|
|
||||||
|
#define ARM_ETH_PHY_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(6,2) /* driver version */
|
||||||
|
|
||||||
|
|
||||||
|
#ifndef ETH_PHY_NUM
|
||||||
|
#define ETH_PHY_NUM 0 /* Default driver number */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef ETH_PHY_ADDR
|
||||||
|
#define ETH_PHY_ADDR 0x01 /* Default device address */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/* Driver Version */
|
||||||
|
static const ARM_DRIVER_VERSION DriverVersion = {
|
||||||
|
ARM_ETH_PHY_API_VERSION,
|
||||||
|
ARM_ETH_PHY_DRV_VERSION
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Ethernet PHY control structure */
|
||||||
|
static PHY_CTRL PHY = { NULL, NULL, 0, 0, 0 };
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
\fn ARM_DRIVER_VERSION GetVersion (void)
|
||||||
|
\brief Get driver version.
|
||||||
|
\return \ref ARM_DRIVER_VERSION
|
||||||
|
*/
|
||||||
|
static ARM_DRIVER_VERSION GetVersion (void) {
|
||||||
|
return DriverVersion;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
\fn int32_t Initialize (ARM_ETH_PHY_Read_t fn_read,
|
||||||
|
ARM_ETH_PHY_Write_t fn_write)
|
||||||
|
\brief Initialize Ethernet PHY Device.
|
||||||
|
\param[in] fn_read Pointer to \ref ARM_ETH_MAC_PHY_Read
|
||||||
|
\param[in] fn_write Pointer to \ref ARM_ETH_MAC_PHY_Write
|
||||||
|
\return \ref execution_status
|
||||||
|
*/
|
||||||
|
static int32_t Initialize (ARM_ETH_PHY_Read_t fn_read, ARM_ETH_PHY_Write_t fn_write) {
|
||||||
|
|
||||||
|
if ((fn_read == NULL) || (fn_write == NULL)) { return ARM_DRIVER_ERROR_PARAMETER; }
|
||||||
|
|
||||||
|
if ((PHY.flags & PHY_INIT) == 0U) {
|
||||||
|
/* Register PHY read/write functions. */
|
||||||
|
PHY.reg_rd = fn_read;
|
||||||
|
PHY.reg_wr = fn_write;
|
||||||
|
|
||||||
|
PHY.bmcr = 0U;
|
||||||
|
PHY.flags = PHY_INIT;
|
||||||
|
}
|
||||||
|
|
||||||
|
return ARM_DRIVER_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
\fn int32_t Uninitialize (void)
|
||||||
|
\brief De-initialize Ethernet PHY Device.
|
||||||
|
\return \ref execution_status
|
||||||
|
*/
|
||||||
|
static int32_t Uninitialize (void) {
|
||||||
|
|
||||||
|
PHY.reg_rd = NULL;
|
||||||
|
PHY.reg_wr = NULL;
|
||||||
|
PHY.bmcr = 0U;
|
||||||
|
PHY.flags = 0U;
|
||||||
|
|
||||||
|
return ARM_DRIVER_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
\fn int32_t PowerControl (ARM_POWER_STATE state)
|
||||||
|
\brief Control Ethernet PHY Device Power.
|
||||||
|
\param[in] state Power state
|
||||||
|
\return \ref execution_status
|
||||||
|
*/
|
||||||
|
static int32_t PowerControl (ARM_POWER_STATE state) {
|
||||||
|
uint16_t val;
|
||||||
|
|
||||||
|
switch ((int32_t)state) {
|
||||||
|
case ARM_POWER_OFF:
|
||||||
|
if ((PHY.flags & PHY_INIT) == 0U) {
|
||||||
|
/* Initialize must provide register access function pointers */
|
||||||
|
return ARM_DRIVER_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
PHY.flags &= ~PHY_POWER;
|
||||||
|
PHY.bmcr = BMCR_POWER_DOWN;
|
||||||
|
|
||||||
|
return (PHY.reg_wr(ETH_PHY_ADDR, REG_BMCR, PHY.bmcr));
|
||||||
|
|
||||||
|
case ARM_POWER_FULL:
|
||||||
|
if ((PHY.flags & PHY_INIT) == 0U) {
|
||||||
|
return ARM_DRIVER_ERROR;
|
||||||
|
}
|
||||||
|
if (PHY.flags & PHY_POWER) {
|
||||||
|
return ARM_DRIVER_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Check Device Identification. */
|
||||||
|
PHY.reg_rd(ETH_PHY_ADDR, REG_PHYIDR1, &val);
|
||||||
|
|
||||||
|
if (val != PHY_ID1) {
|
||||||
|
/* Invalid PHY ID */
|
||||||
|
return ARM_DRIVER_ERROR_UNSUPPORTED;
|
||||||
|
}
|
||||||
|
|
||||||
|
PHY.reg_rd(ETH_PHY_ADDR, REG_PHYIDR2, &val);
|
||||||
|
|
||||||
|
if ((val & 0xFFF0) != PHY_ID2) {
|
||||||
|
/* Invalid PHY ID */
|
||||||
|
return ARM_DRIVER_ERROR_UNSUPPORTED;
|
||||||
|
}
|
||||||
|
|
||||||
|
PHY.bmcr = 0U;
|
||||||
|
|
||||||
|
if (PHY.reg_wr(ETH_PHY_ADDR, REG_BMCR, PHY.bmcr) != ARM_DRIVER_OK) {
|
||||||
|
return ARM_DRIVER_ERROR;
|
||||||
|
}
|
||||||
|
|
||||||
|
PHY.flags |= PHY_POWER;
|
||||||
|
|
||||||
|
return ARM_DRIVER_OK;
|
||||||
|
|
||||||
|
case ARM_POWER_LOW:
|
||||||
|
default:
|
||||||
|
return ARM_DRIVER_ERROR_UNSUPPORTED;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
\fn int32_t SetInterface (uint32_t interface)
|
||||||
|
\brief Set Ethernet Media Interface.
|
||||||
|
\param[in] interface Media Interface type
|
||||||
|
\return \ref execution_status
|
||||||
|
*/
|
||||||
|
static int32_t SetInterface (uint32_t interface) {
|
||||||
|
uint16_t val;
|
||||||
|
|
||||||
|
if ((PHY.flags & PHY_POWER) == 0U) { return ARM_DRIVER_ERROR; }
|
||||||
|
|
||||||
|
switch (interface) {
|
||||||
|
case ARM_ETH_INTERFACE_MII:
|
||||||
|
val = 0x0001;
|
||||||
|
break;
|
||||||
|
case ARM_ETH_INTERFACE_RMII:
|
||||||
|
val = RBR_RMII_MODE | 0x0001;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
return ARM_DRIVER_ERROR_UNSUPPORTED;
|
||||||
|
}
|
||||||
|
|
||||||
|
return (PHY.reg_wr(ETH_PHY_ADDR, REG_RBR, val));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
\fn int32_t SetMode (uint32_t mode)
|
||||||
|
\brief Set Ethernet PHY Device Operation mode.
|
||||||
|
\param[in] mode Operation Mode
|
||||||
|
\return \ref execution_status
|
||||||
|
*/
|
||||||
|
static int32_t SetMode (uint32_t mode) {
|
||||||
|
uint16_t val;
|
||||||
|
|
||||||
|
if ((PHY.flags & PHY_POWER) == 0U) { return ARM_DRIVER_ERROR; }
|
||||||
|
|
||||||
|
val = PHY.bmcr & BMCR_POWER_DOWN;
|
||||||
|
|
||||||
|
switch (mode & ARM_ETH_PHY_SPEED_Msk) {
|
||||||
|
case ARM_ETH_PHY_SPEED_10M:
|
||||||
|
break;
|
||||||
|
case ARM_ETH_PHY_SPEED_100M:
|
||||||
|
val |= BMCR_SPEED_SEL;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
return ARM_DRIVER_ERROR_UNSUPPORTED;
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (mode & ARM_ETH_PHY_DUPLEX_Msk) {
|
||||||
|
case ARM_ETH_PHY_DUPLEX_HALF:
|
||||||
|
break;
|
||||||
|
case ARM_ETH_PHY_DUPLEX_FULL:
|
||||||
|
val |= BMCR_DUPLEX;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
return ARM_DRIVER_ERROR_UNSUPPORTED;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (mode & ARM_ETH_PHY_AUTO_NEGOTIATE) {
|
||||||
|
val |= BMCR_ANEG_EN;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (mode & ARM_ETH_PHY_LOOPBACK) {
|
||||||
|
val |= BMCR_LOOPBACK;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (mode & ARM_ETH_PHY_ISOLATE) {
|
||||||
|
val |= BMCR_ISOLATE;
|
||||||
|
}
|
||||||
|
|
||||||
|
PHY.bmcr = val;
|
||||||
|
|
||||||
|
return (PHY.reg_wr(ETH_PHY_ADDR, REG_BMCR, PHY.bmcr));
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
\fn ARM_ETH_LINK_STATE GetLinkState (void)
|
||||||
|
\brief Get Ethernet PHY Device Link state.
|
||||||
|
\return current link status \ref ARM_ETH_LINK_STATE
|
||||||
|
*/
|
||||||
|
static ARM_ETH_LINK_STATE GetLinkState (void) {
|
||||||
|
ARM_ETH_LINK_STATE state;
|
||||||
|
uint16_t val = 0U;
|
||||||
|
|
||||||
|
if (PHY.flags & PHY_POWER) {
|
||||||
|
PHY.reg_rd(ETH_PHY_ADDR, REG_BMSR, &val);
|
||||||
|
}
|
||||||
|
state = (val & BMSR_LINK_STAT) ? ARM_ETH_LINK_UP : ARM_ETH_LINK_DOWN;
|
||||||
|
|
||||||
|
return (state);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
\fn ARM_ETH_LINK_INFO GetLinkInfo (void)
|
||||||
|
\brief Get Ethernet PHY Device Link information.
|
||||||
|
\return current link parameters \ref ARM_ETH_LINK_INFO
|
||||||
|
*/
|
||||||
|
static ARM_ETH_LINK_INFO GetLinkInfo (void) {
|
||||||
|
ARM_ETH_LINK_INFO info;
|
||||||
|
uint16_t val = 0U;
|
||||||
|
|
||||||
|
if (PHY.flags & PHY_POWER) {
|
||||||
|
PHY.reg_rd(ETH_PHY_ADDR, REG_PHYSTS, &val);
|
||||||
|
}
|
||||||
|
|
||||||
|
info.speed = (val & PHYSTS_SPEED) ? ARM_ETH_SPEED_10M : ARM_ETH_SPEED_100M;
|
||||||
|
info.duplex = (val & PHYSTS_DUPLEX) ? ARM_ETH_DUPLEX_FULL : ARM_ETH_DUPLEX_HALF;
|
||||||
|
|
||||||
|
return (info);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/* PHY Driver Control Block */
|
||||||
|
extern
|
||||||
|
ARM_DRIVER_ETH_PHY ARM_Driver_ETH_PHY_(ETH_PHY_NUM);
|
||||||
|
ARM_DRIVER_ETH_PHY ARM_Driver_ETH_PHY_(ETH_PHY_NUM) = {
|
||||||
|
GetVersion,
|
||||||
|
Initialize,
|
||||||
|
Uninitialize,
|
||||||
|
PowerControl,
|
||||||
|
SetInterface,
|
||||||
|
SetMode,
|
||||||
|
GetLinkState,
|
||||||
|
GetLinkInfo
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,201 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2013-2018 Arm Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||||
|
* not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||||
|
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*
|
||||||
|
* -----------------------------------------------------------------------
|
||||||
|
*
|
||||||
|
* $Date: 25. May 2018
|
||||||
|
* $Revision: V6.2
|
||||||
|
*
|
||||||
|
* Project: Ethernet Physical Layer Transceiver (PHY)
|
||||||
|
* Definitions for DP83848C
|
||||||
|
* -------------------------------------------------------------------- */
|
||||||
|
|
||||||
|
#ifndef __PHY_DP83848C_H
|
||||||
|
#define __PHY_DP83848C_H
|
||||||
|
|
||||||
|
#include "Driver_ETH_PHY.h"
|
||||||
|
|
||||||
|
/* Basic Registers */
|
||||||
|
#define REG_BMCR 0x00 /* Basic Mode Control Register */
|
||||||
|
#define REG_BMSR 0x01 /* Basic Mode Status Register */
|
||||||
|
#define REG_PHYIDR1 0x02 /* PHY Identifier 1 */
|
||||||
|
#define REG_PHYIDR2 0x03 /* PHY Identifier 2 */
|
||||||
|
#define REG_ANAR 0x04 /* Auto-Negotiation Advertisement */
|
||||||
|
#define REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Abitily */
|
||||||
|
#define REG_ANER 0x06 /* Auto-Neg. Expansion Register */
|
||||||
|
#define REG_ANNPTR 0x07 /* Auto-Neg. Next Page TX */
|
||||||
|
|
||||||
|
/* Extended Registers */
|
||||||
|
#define REG_PHYSTS 0x10 /* Status Register */
|
||||||
|
#define REG_MICR 0x11 /* MII Interrupt Control Register */
|
||||||
|
#define REG_MISR 0x12 /* MII Interrupt Status Register */
|
||||||
|
#define REG_FCSCR 0x14 /* False Carrier Sense Counter */
|
||||||
|
#define REG_RECR 0x15 /* Receive Error Counter */
|
||||||
|
#define REG_PCSR 0x16 /* PCS Sublayer Config. and Status */
|
||||||
|
#define REG_RBR 0x17 /* RMII and Bypass Register */
|
||||||
|
#define REG_LEDCR 0x18 /* LED Direct Control Register */
|
||||||
|
#define REG_PHYCR 0x19 /* PHY Control Register */
|
||||||
|
#define REG_BTSCR 0x1A /* 10Base-T Status/Control Register */
|
||||||
|
#define REG_CDBR1 0x1B /* CD Test Control and BIST Extens. */
|
||||||
|
#define REG_EDCR 0x1D /* Energy Detect Control Register */
|
||||||
|
|
||||||
|
/* Basic Mode Control Register */
|
||||||
|
#define BMCR_RESET 0x8000 /* Software Reset */
|
||||||
|
#define BMCR_LOOPBACK 0x4000 /* Loopback mode */
|
||||||
|
#define BMCR_SPEED_SEL 0x2000 /* Speed Select (1=100Mb/s) */
|
||||||
|
#define BMCR_ANEG_EN 0x1000 /* Auto Negotiation Enable */
|
||||||
|
#define BMCR_POWER_DOWN 0x0800 /* Power Down */
|
||||||
|
#define BMCR_ISOLATE 0x0400 /* Isolate Media interface */
|
||||||
|
#define BMCR_REST_ANEG 0x0200 /* Restart Auto Negotiation */
|
||||||
|
#define BMCR_DUPLEX 0x0100 /* Duplex Mode (1=Full duplex) */
|
||||||
|
#define BMCR_COL_TEST 0x0080 /* Collision Test */
|
||||||
|
|
||||||
|
/* Basic Mode Status Register */
|
||||||
|
#define BMSR_100B_T4 0x8000 /* 100BASE-T4 Capable */
|
||||||
|
#define BMSR_100B_TX_FD 0x4000 /* 100BASE-TX Full Duplex Capable */
|
||||||
|
#define BMSR_100B_TX_HD 0x2000 /* 100BASE-TX Half Duplex Capable */
|
||||||
|
#define BMSR_10B_T_FD 0x1000 /* 10BASE-T Full Duplex Capable */
|
||||||
|
#define BMSR_10B_T_HD 0x0800 /* 10BASE-T Half Duplex Capable */
|
||||||
|
#define BMSR_MF_PRE_SUP 0x0040 /* Preamble suppression Capable */
|
||||||
|
#define BMSR_ANEG_COMPL 0x0020 /* Auto Negotiation Complete */
|
||||||
|
#define BMSR_REM_FAULT 0x0010 /* Remote Fault */
|
||||||
|
#define BMSR_ANEG_ABIL 0x0008 /* Auto Negotiation Ability */
|
||||||
|
#define BMSR_LINK_STAT 0x0004 /* Link Status (1=established) */
|
||||||
|
#define BMSR_JABBER_DET 0x0002 /* Jaber Detect */
|
||||||
|
#define BMSR_EXT_CAPAB 0x0001 /* Extended Capability */
|
||||||
|
|
||||||
|
/* PHY Identifier Registers */
|
||||||
|
#define PHY_ID1 0x2000 /* DP83848C Device Identifier MSB */
|
||||||
|
#define PHY_ID2 0x5C90 /* DP83848C Device Identifier LSB */
|
||||||
|
|
||||||
|
/* PHY Status Register */
|
||||||
|
#define PHYSTS_MDI_X 0x4000 /* MDI-X mode enabled by Auto-Negot. */
|
||||||
|
#define PHYSTS_REC_ERR 0x2000 /* Receive Error Latch */
|
||||||
|
#define PHYSTS_POL_STAT 0x1000 /* Polarity Status */
|
||||||
|
#define PHYSTS_FC_SENSE 0x0800 /* False Carrier Sense Latch */
|
||||||
|
#define PHYSTS_SIG_DET 0x0400 /* 100Base-TX Signal Detect */
|
||||||
|
#define PHYSTS_DES_LOCK 0x0200 /* 100Base-TX Descrambler Lock */
|
||||||
|
#define PHYSTS_PAGE_REC 0x0100 /* Link Code Word Page Received */
|
||||||
|
#define PHYSTS_MII_INT 0x0080 /* MII Interrupt Pending */
|
||||||
|
#define PHYSTS_REM_FAULT 0x0040 /* Remote Fault */
|
||||||
|
#define PHYSTS_JABBER_DET 0x0020 /* Jabber Detect */
|
||||||
|
#define PHYSTS_ANEG_COMPL 0x0010 /* Auto Negotiation Complete */
|
||||||
|
#define PHYSTS_LOOPBACK 0x0008 /* Loopback Status */
|
||||||
|
#define PHYSTS_DUPLEX 0x0004 /* Duplex Status (1=Full duplex) */
|
||||||
|
#define PHYSTS_SPEED 0x0002 /* Speed10 Status (1=10MBit/s) */
|
||||||
|
#define PHYSTS_LINK_STAT 0x0001 /* Link Status (1=established) */
|
||||||
|
|
||||||
|
/* MII Interrupt Control Register */
|
||||||
|
#define MICR_TINT 0x0004 /* Test Interrupt */
|
||||||
|
#define MICR_INTEN 0x0002 /* Interrupt Enable */
|
||||||
|
#define MICR_INT_OE 0x0001 /* Interrupt Output Enable */
|
||||||
|
|
||||||
|
/* MII Interrupt Status Register */
|
||||||
|
#define MISR_ED_INT 0x4000 /* Energy Detect Interrupt */
|
||||||
|
#define MISR_LINK_INT 0x2000 /* Link Status Change Interrupt */
|
||||||
|
#define MISR_SPD_INT 0x1000 /* Speed Status Change Interrupt */
|
||||||
|
#define MISR_DUP_INT 0x0800 /* Duplex Status Change Interrupt */
|
||||||
|
#define MISR_ANC_INT 0x0400 /* Auto Negotiation Complete Interr. */
|
||||||
|
#define MISR_FHF_INT 0x0200 /* False Carrier Counter HF Interrupt*/
|
||||||
|
#define MISR_RHF_INT 0x0100 /* Receive Error Counter HF Interrupt*/
|
||||||
|
#define MISR_ED_INT_EN 0x0040 /* Endrgy Detect Int.Enable */
|
||||||
|
#define MISR_LINK_INT_EN 0x0020 /* Link Status Change Int.Enable */
|
||||||
|
#define MISR_SPD_INT_EN 0x0010 /* Speed Status Change Int.Enable */
|
||||||
|
#define MISR_DUP_INT_EN 0x0008 /* Duplex Status Change Int.Enable */
|
||||||
|
#define MISR_ANC_INT_EN 0x0004 /* Auto Negotiation Complete Int.Ena.*/
|
||||||
|
#define MISR_FHF_INT_EN 0x0002 /* False Carrier Count.HF Int.Enable */
|
||||||
|
#define MISR_RHF_INT_EN 0x0001 /* Receive Error Count.HF Int.Enable */
|
||||||
|
|
||||||
|
/* 100Mb/s PCS Configuration and Status Register */
|
||||||
|
#define PCSR_TQ_EN 0x0400 /* 100Mbs True Quiet Mode Enable */
|
||||||
|
#define PCSR_SD_FORCE_PMA 0x0200 /* Signal Detect Force PMA */
|
||||||
|
#define PCSR_SD_OPTION 0x0100 /* Signal Detect Option */
|
||||||
|
#define PCSR_DESC_TIME 0x0080 /* Descrambler Timeout */
|
||||||
|
#define PCSR_FORCE_100_OK 0x0020 /* Force 100Mb/s Good Link */
|
||||||
|
#define PCSR_NRZI_BYPASS 0x0004 /* NRZI Bypass Enable */
|
||||||
|
|
||||||
|
/* RMII and Bypass Register */
|
||||||
|
#define RBR_RMII_MODE 0x0020 /* Reduced MII Mode */
|
||||||
|
#define RBR_RMII_REV1_0 0x0010 /* Reduced MII Revision 1.0 */
|
||||||
|
#define RBR_RX_OVF_STS 0x0008 /* RX FIFO Overflow Status */
|
||||||
|
#define RBR_RX_UNF_STS 0x0004 /* RX FIFO Underflow Status */
|
||||||
|
#define RBR_ELAST_BUF 0x0003 /* Receive Elasticity Buffer */
|
||||||
|
|
||||||
|
/* LED Direct Control Register */
|
||||||
|
#define LEDCR_DRV_SPDLED 0x0020 /* Drive SPDLED bit to LED_SPD output*/
|
||||||
|
#define LEDCR_DRV_LNKLED 0x0010 /* Drive LNKLED bit to LED_LNK output*/
|
||||||
|
#define LEDCR_DRV_ACTLED 0x0008 /* Drive ACTLED bit to LED_ACT output*/
|
||||||
|
#define LEDCR_SPDLED 0x0004 /* Value to force on LED_SPD output */
|
||||||
|
#define LEDCR_LNKLED 0x0002 /* Value to force on LED_LNK output */
|
||||||
|
#define LEDCR_ACTLED 0x0001 /* Value to force on LED_ACT output */
|
||||||
|
|
||||||
|
/* PHY Control Register */
|
||||||
|
#define PHYCR_MDIX_EN 0x8000 /* Auto MDIX Enable */
|
||||||
|
#define PHYCR_FORCE_MDIX 0x4000 /* Force MDIX */
|
||||||
|
#define PHYCR_PAUSE_RX 0x2000 /* Pause Receive Negotiated */
|
||||||
|
#define PHYCR_PAUSE_TX 0x1000 /* Pause Transmit Negotiated */
|
||||||
|
#define PHYCR_BIST_FE 0x0800 /* BIST Force Error */
|
||||||
|
#define PHYCR_PSR_15 0x0400 /* BIST Sequence select */
|
||||||
|
#define PHYCR_BIST_STATUS 0x0200 /* BIST Test Status */
|
||||||
|
#define PHYCR_BIST_START 0x0100 /* BIST Start */
|
||||||
|
#define PHYCR_BP_STRETCH 0x0080 /* Bypass LED Stretching */
|
||||||
|
#define PHYCR_LED_CNFG 0x0060 /* LEDs Configuration */
|
||||||
|
#define PHYCR_PHYADDR 0x001F /* PHY Address for port */
|
||||||
|
|
||||||
|
/* 10Base-T Status/Control Register */
|
||||||
|
#define BTSCR_10BT_SER 0x8000 /* 10Base-T Serial Mode */
|
||||||
|
#define BTSCR_SQUELCH 0x0E00 /* Squelch Configuration */
|
||||||
|
#define BTSCR_LOOPB10_DIS 0x0100 /* Loopback 10Base-T Disable */
|
||||||
|
#define BTSCR_LP_DIS 0x0080 /* Normal Link Pulse Disable */
|
||||||
|
#define BTSCR_FORCE_LNK10 0x0040 /* Force 10Mbs Good Link */
|
||||||
|
#define BTSCR_POLARITY 0x0010 /* 10Mbs Polarity Status */
|
||||||
|
#define BTSCR_HEARTB_DIS 0x0002 /* Heartbeat Disable */
|
||||||
|
#define BTSCR_JABBER_DIS 0x0001 /* Jabber Disable */
|
||||||
|
|
||||||
|
/* CD Test and BIST Extensions Register */
|
||||||
|
#define CDBR1_BIST_ERR_CNTR 0xFF00 /* BIST ERROR Counter */
|
||||||
|
#define CDBR1_BIST_CONT_MD 0x0020 /* Packet BIST Continuous Mode */
|
||||||
|
#define CDBR1_CDPATEN10 0x0010 /* CD Pattern Enable for 10Mbs */
|
||||||
|
#define CDBR1_10MEG_PAT_GAP 0x0004 /* Defines gap between data or NLP */
|
||||||
|
#define CDBR1_CDPATTSEL 0x0003 /* CD Pattern Select */
|
||||||
|
|
||||||
|
/* Energy Detect Control */
|
||||||
|
#define EDCR_ED_EN 0x8000 /* Energy Detect Enable */
|
||||||
|
#define EDCR_ED_AUTO_UP 0x4000 /* Energy Detect Automatic Power Up */
|
||||||
|
#define EDCR_ED_AUTO_DOWN 0x2000 /* Energy Detect Automatic Power Down*/
|
||||||
|
#define EDCR_ED_MAN 0x1000 /* Energy Detect Manual Power Up/Down*/
|
||||||
|
#define EDCR_ED_BURST_DIS 0x0800 /* Energy Detect Burst Disable */
|
||||||
|
#define EDCR_ED_PWR_STATE 0x0400 /* Energy Detect Power State */
|
||||||
|
#define EDCR_ED_ERR_MET 0x0200 /* Energy Detect Error Threshold Met */
|
||||||
|
#define EDCR_ED_DATA_MET 0x0100 /* Energy Detect Data Threshold Met */
|
||||||
|
#define EDCR_ED_ERR_CNT 0x00F0 /* Energy Detect Error Threshold */
|
||||||
|
#define EDCR_ED_DATA_CNT 0x000F /* Energy Detect Data Threshold */
|
||||||
|
|
||||||
|
/* PHY Driver State Flags */
|
||||||
|
#define PHY_INIT 0x01U /* Driver initialized */
|
||||||
|
#define PHY_POWER 0x02U /* Driver power is on */
|
||||||
|
|
||||||
|
/* PHY Driver Control Structure */
|
||||||
|
typedef struct phy_ctrl {
|
||||||
|
ARM_ETH_PHY_Read_t reg_rd; /* PHY register read function */
|
||||||
|
ARM_ETH_PHY_Write_t reg_wr; /* PHY register write function */
|
||||||
|
uint16_t bmcr; /* BMCR register value */
|
||||||
|
uint8_t flags; /* Control flags */
|
||||||
|
uint8_t rsvd; /* Reserved */
|
||||||
|
} PHY_CTRL;
|
||||||
|
|
||||||
|
#endif /* __PHY_DP83848C_H */
|
||||||
|
|
@ -46,8 +46,6 @@
|
||||||
/* Keil.ARM Compiler::Compiler:I/O:STDOUT:User:1.2.0 */
|
/* Keil.ARM Compiler::Compiler:I/O:STDOUT:User:1.2.0 */
|
||||||
#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
|
#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
|
||||||
#define RTE_Compiler_IO_STDOUT_User /* Compiler I/O: STDOUT User */
|
#define RTE_Compiler_IO_STDOUT_User /* Compiler I/O: STDOUT User */
|
||||||
/* Keil::CMSIS Driver:Ethernet PHY:DP83848C:6.2.0 */
|
|
||||||
#define RTE_Drivers_PHY_DP83848C /* Driver PHY DP83848C */
|
|
||||||
|
|
||||||
|
|
||||||
#endif /* RTE_COMPONENTS_H */
|
#endif /* RTE_COMPONENTS_H */
|
||||||
|
|
|
||||||
File diff suppressed because one or more lines are too long
|
|
@ -153,7 +153,40 @@
|
||||||
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F10x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F107VC$Flash\GD32F10x_CL.FLM))</Name>
|
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F10x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F107VC$Flash\GD32F10x_CL.FLM))</Name>
|
||||||
</SetRegEntry>
|
</SetRegEntry>
|
||||||
</TargetDriverDllRegistry>
|
</TargetDriverDllRegistry>
|
||||||
<Breakpoint/>
|
<Breakpoint>
|
||||||
|
<Bp>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Type>0</Type>
|
||||||
|
<LineNumber>391</LineNumber>
|
||||||
|
<EnabledFlag>1</EnabledFlag>
|
||||||
|
<Address>0</Address>
|
||||||
|
<ByteObject>0</ByteObject>
|
||||||
|
<HtxType>0</HtxType>
|
||||||
|
<ManyObjects>0</ManyObjects>
|
||||||
|
<SizeOfObject>0</SizeOfObject>
|
||||||
|
<BreakByAccess>0</BreakByAccess>
|
||||||
|
<BreakIfRCount>0</BreakIfRCount>
|
||||||
|
<Filename>.\FreeRTOS\source\FreeRTOS_IP.c</Filename>
|
||||||
|
<ExecCommand></ExecCommand>
|
||||||
|
<Expression></Expression>
|
||||||
|
</Bp>
|
||||||
|
<Bp>
|
||||||
|
<Number>1</Number>
|
||||||
|
<Type>0</Type>
|
||||||
|
<LineNumber>406</LineNumber>
|
||||||
|
<EnabledFlag>1</EnabledFlag>
|
||||||
|
<Address>0</Address>
|
||||||
|
<ByteObject>0</ByteObject>
|
||||||
|
<HtxType>0</HtxType>
|
||||||
|
<ManyObjects>0</ManyObjects>
|
||||||
|
<SizeOfObject>0</SizeOfObject>
|
||||||
|
<BreakByAccess>0</BreakByAccess>
|
||||||
|
<BreakIfRCount>0</BreakIfRCount>
|
||||||
|
<Filename>.\FreeRTOS\source\FreeRTOS_IP.c</Filename>
|
||||||
|
<ExecCommand></ExecCommand>
|
||||||
|
<Expression></Expression>
|
||||||
|
</Bp>
|
||||||
|
</Breakpoint>
|
||||||
<WatchWindow1>
|
<WatchWindow1>
|
||||||
<Ww>
|
<Ww>
|
||||||
<count>0</count>
|
<count>0</count>
|
||||||
|
|
@ -170,15 +203,41 @@
|
||||||
<WinNumber>1</WinNumber>
|
<WinNumber>1</WinNumber>
|
||||||
<ItemText>mac</ItemText>
|
<ItemText>mac</ItemText>
|
||||||
</Ww>
|
</Ww>
|
||||||
|
<Ww>
|
||||||
|
<count>3</count>
|
||||||
|
<WinNumber>1</WinNumber>
|
||||||
|
<ItemText>PHY</ItemText>
|
||||||
|
</Ww>
|
||||||
</WatchWindow1>
|
</WatchWindow1>
|
||||||
<MemoryWindow1>
|
<MemoryWindow1>
|
||||||
<Mm>
|
<Mm>
|
||||||
<WinNumber>1</WinNumber>
|
<WinNumber>1</WinNumber>
|
||||||
<SubType>0</SubType>
|
<SubType>0</SubType>
|
||||||
<ItemText>0x40011000</ItemText>
|
<ItemText>0x40028014</ItemText>
|
||||||
<AccSizeX>0</AccSizeX>
|
<AccSizeX>0</AccSizeX>
|
||||||
</Mm>
|
</Mm>
|
||||||
</MemoryWindow1>
|
</MemoryWindow1>
|
||||||
|
<MemoryWindow2>
|
||||||
|
<Mm>
|
||||||
|
<WinNumber>2</WinNumber>
|
||||||
|
<SubType>0</SubType>
|
||||||
|
<ItemText>0x20001FCC</ItemText>
|
||||||
|
<AccSizeX>0</AccSizeX>
|
||||||
|
</Mm>
|
||||||
|
</MemoryWindow2>
|
||||||
|
<MemoryWindow3>
|
||||||
|
<Mm>
|
||||||
|
<WinNumber>3</WinNumber>
|
||||||
|
<SubType>0</SubType>
|
||||||
|
<ItemText>reg</ItemText>
|
||||||
|
<AccSizeX>0</AccSizeX>
|
||||||
|
</Mm>
|
||||||
|
</MemoryWindow3>
|
||||||
|
<ScvdPack>
|
||||||
|
<Filename>C:\Users\User\AppData\Local\Arm\Packs\ARM\CMSIS-FreeRTOS\10.5.1\CMSIS\RTOS2\FreeRTOS\FreeRTOS.scvd</Filename>
|
||||||
|
<Type>ARM.CMSIS-FreeRTOS.10.5.1</Type>
|
||||||
|
<SubType>1</SubType>
|
||||||
|
</ScvdPack>
|
||||||
<Tracepoint>
|
<Tracepoint>
|
||||||
<THDelay>0</THDelay>
|
<THDelay>0</THDelay>
|
||||||
</Tracepoint>
|
</Tracepoint>
|
||||||
|
|
@ -278,6 +337,18 @@
|
||||||
<RteFlg>0</RteFlg>
|
<RteFlg>0</RteFlg>
|
||||||
<bShared>0</bShared>
|
<bShared>0</bShared>
|
||||||
</File>
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>5</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>.\PHY\PHY_DP83848C.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>PHY_DP83848C.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
</Group>
|
</Group>
|
||||||
|
|
||||||
<Group>
|
<Group>
|
||||||
|
|
@ -288,7 +359,7 @@
|
||||||
<RteFlg>0</RteFlg>
|
<RteFlg>0</RteFlg>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>5</FileNumber>
|
<FileNumber>6</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -300,7 +371,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>6</FileNumber>
|
<FileNumber>7</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -312,7 +383,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>7</FileNumber>
|
<FileNumber>8</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -324,7 +395,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>8</FileNumber>
|
<FileNumber>9</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -336,7 +407,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>9</FileNumber>
|
<FileNumber>10</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -348,7 +419,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>10</FileNumber>
|
<FileNumber>11</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -360,7 +431,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>11</FileNumber>
|
<FileNumber>12</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -372,7 +443,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>12</FileNumber>
|
<FileNumber>13</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -384,7 +455,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>13</FileNumber>
|
<FileNumber>14</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -396,7 +467,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>14</FileNumber>
|
<FileNumber>15</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -408,7 +479,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>15</FileNumber>
|
<FileNumber>16</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -420,7 +491,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>16</FileNumber>
|
<FileNumber>17</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -432,7 +503,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>17</FileNumber>
|
<FileNumber>18</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -444,7 +515,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>18</FileNumber>
|
<FileNumber>19</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -456,7 +527,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>19</FileNumber>
|
<FileNumber>20</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -468,7 +539,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>20</FileNumber>
|
<FileNumber>21</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -480,7 +551,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>21</FileNumber>
|
<FileNumber>22</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -492,7 +563,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>22</FileNumber>
|
<FileNumber>23</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -504,7 +575,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>23</FileNumber>
|
<FileNumber>24</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -516,7 +587,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>24</FileNumber>
|
<FileNumber>25</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -528,7 +599,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>25</FileNumber>
|
<FileNumber>26</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -540,7 +611,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>26</FileNumber>
|
<FileNumber>27</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -552,7 +623,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>27</FileNumber>
|
<FileNumber>28</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -564,7 +635,7 @@
|
||||||
</File>
|
</File>
|
||||||
<File>
|
<File>
|
||||||
<GroupNumber>2</GroupNumber>
|
<GroupNumber>2</GroupNumber>
|
||||||
<FileNumber>28</FileNumber>
|
<FileNumber>29</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
|
@ -602,22 +673,6 @@
|
||||||
|
|
||||||
<Group>
|
<Group>
|
||||||
<GroupName>::Device</GroupName>
|
<GroupName>::Device</GroupName>
|
||||||
<tvExp>0</tvExp>
|
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
|
||||||
<cbSel>0</cbSel>
|
|
||||||
<RteFlg>1</RteFlg>
|
|
||||||
</Group>
|
|
||||||
|
|
||||||
<Group>
|
|
||||||
<GroupName>::FreeRTOS</GroupName>
|
|
||||||
<tvExp>0</tvExp>
|
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
|
||||||
<cbSel>0</cbSel>
|
|
||||||
<RteFlg>1</RteFlg>
|
|
||||||
</Group>
|
|
||||||
|
|
||||||
<Group>
|
|
||||||
<GroupName>::RTOS</GroupName>
|
|
||||||
<tvExp>1</tvExp>
|
<tvExp>1</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
<cbSel>0</cbSel>
|
<cbSel>0</cbSel>
|
||||||
|
|
@ -625,7 +680,7 @@
|
||||||
</Group>
|
</Group>
|
||||||
|
|
||||||
<Group>
|
<Group>
|
||||||
<GroupName>::Security</GroupName>
|
<GroupName>::RTOS</GroupName>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>0</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
<cbSel>0</cbSel>
|
<cbSel>0</cbSel>
|
||||||
|
|
|
||||||
|
|
@ -341,7 +341,7 @@
|
||||||
<MiscControls>-D DEBUG -Wno-pragma-pack -Wno-macro-redefined</MiscControls>
|
<MiscControls>-D DEBUG -Wno-pragma-pack -Wno-macro-redefined</MiscControls>
|
||||||
<Define></Define>
|
<Define></Define>
|
||||||
<Undefine></Undefine>
|
<Undefine></Undefine>
|
||||||
<IncludePath>.\FreeRTOS\source\portable\NetworkInterface\include;.\FreeRTOS\source\include;.\FreeRTOS\source\portable\Compiler\Keil;C:\Users\User\AppData\Local\Arm\Packs\Arm-Packs\PKCS11\1.0.0\include;.\DemoTasks\include</IncludePath>
|
<IncludePath>.\FreeRTOS\source\portable\NetworkInterface\include;.\FreeRTOS\source\include;.\FreeRTOS\source\portable\Compiler\Keil;.\DemoTasks\include</IncludePath>
|
||||||
</VariousControls>
|
</VariousControls>
|
||||||
</Cads>
|
</Cads>
|
||||||
<Aads>
|
<Aads>
|
||||||
|
|
@ -405,6 +405,11 @@
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<FilePath>.\DemoTasks\TCPEchoClient_SingleTasks.c</FilePath>
|
<FilePath>.\DemoTasks\TCPEchoClient_SingleTasks.c</FilePath>
|
||||||
</File>
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>PHY_DP83848C.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>.\PHY\PHY_DP83848C.c</FilePath>
|
||||||
|
</File>
|
||||||
</Files>
|
</Files>
|
||||||
</Group>
|
</Group>
|
||||||
<Group>
|
<Group>
|
||||||
|
|
@ -613,78 +618,6 @@
|
||||||
<Group>
|
<Group>
|
||||||
<GroupName>::Device</GroupName>
|
<GroupName>::Device</GroupName>
|
||||||
</Group>
|
</Group>
|
||||||
<Group>
|
|
||||||
<GroupName>::FreeRTOS</GroupName>
|
|
||||||
<GroupOption>
|
|
||||||
<CommonProperty>
|
|
||||||
<UseCPPCompiler>0</UseCPPCompiler>
|
|
||||||
<RVCTCodeConst>0</RVCTCodeConst>
|
|
||||||
<RVCTZI>0</RVCTZI>
|
|
||||||
<RVCTOtherData>0</RVCTOtherData>
|
|
||||||
<ModuleSelection>0</ModuleSelection>
|
|
||||||
<IncludeInBuild>0</IncludeInBuild>
|
|
||||||
<AlwaysBuild>2</AlwaysBuild>
|
|
||||||
<GenerateAssemblyFile>2</GenerateAssemblyFile>
|
|
||||||
<AssembleAssemblyFile>2</AssembleAssemblyFile>
|
|
||||||
<PublicsOnly>2</PublicsOnly>
|
|
||||||
<StopOnExitCode>11</StopOnExitCode>
|
|
||||||
<CustomArgument></CustomArgument>
|
|
||||||
<IncludeLibraryModules></IncludeLibraryModules>
|
|
||||||
<ComprImg>1</ComprImg>
|
|
||||||
</CommonProperty>
|
|
||||||
<GroupArmAds>
|
|
||||||
<Cads>
|
|
||||||
<interw>2</interw>
|
|
||||||
<Optim>0</Optim>
|
|
||||||
<oTime>2</oTime>
|
|
||||||
<SplitLS>2</SplitLS>
|
|
||||||
<OneElfS>2</OneElfS>
|
|
||||||
<Strict>2</Strict>
|
|
||||||
<EnumInt>2</EnumInt>
|
|
||||||
<PlainCh>2</PlainCh>
|
|
||||||
<Ropi>2</Ropi>
|
|
||||||
<Rwpi>2</Rwpi>
|
|
||||||
<wLevel>0</wLevel>
|
|
||||||
<uThumb>2</uThumb>
|
|
||||||
<uSurpInc>2</uSurpInc>
|
|
||||||
<uC99>2</uC99>
|
|
||||||
<uGnu>2</uGnu>
|
|
||||||
<useXO>2</useXO>
|
|
||||||
<v6Lang>0</v6Lang>
|
|
||||||
<v6LangP>0</v6LangP>
|
|
||||||
<vShortEn>2</vShortEn>
|
|
||||||
<vShortWch>2</vShortWch>
|
|
||||||
<v6Lto>2</v6Lto>
|
|
||||||
<v6WtE>2</v6WtE>
|
|
||||||
<v6Rtti>2</v6Rtti>
|
|
||||||
<VariousControls>
|
|
||||||
<MiscControls></MiscControls>
|
|
||||||
<Define></Define>
|
|
||||||
<Undefine></Undefine>
|
|
||||||
<IncludePath></IncludePath>
|
|
||||||
</VariousControls>
|
|
||||||
</Cads>
|
|
||||||
<Aads>
|
|
||||||
<interw>2</interw>
|
|
||||||
<Ropi>2</Ropi>
|
|
||||||
<Rwpi>2</Rwpi>
|
|
||||||
<thumb>2</thumb>
|
|
||||||
<SplitLS>2</SplitLS>
|
|
||||||
<SwStkChk>2</SwStkChk>
|
|
||||||
<NoWarn>2</NoWarn>
|
|
||||||
<uSurpInc>2</uSurpInc>
|
|
||||||
<useXO>2</useXO>
|
|
||||||
<ClangAsOpt>0</ClangAsOpt>
|
|
||||||
<VariousControls>
|
|
||||||
<MiscControls></MiscControls>
|
|
||||||
<Define></Define>
|
|
||||||
<Undefine></Undefine>
|
|
||||||
<IncludePath></IncludePath>
|
|
||||||
</VariousControls>
|
|
||||||
</Aads>
|
|
||||||
</GroupArmAds>
|
|
||||||
</GroupOption>
|
|
||||||
</Group>
|
|
||||||
<Group>
|
<Group>
|
||||||
<GroupName>::RTOS</GroupName>
|
<GroupName>::RTOS</GroupName>
|
||||||
<GroupOption>
|
<GroupOption>
|
||||||
|
|
@ -757,78 +690,6 @@
|
||||||
</GroupArmAds>
|
</GroupArmAds>
|
||||||
</GroupOption>
|
</GroupOption>
|
||||||
</Group>
|
</Group>
|
||||||
<Group>
|
|
||||||
<GroupName>::Security</GroupName>
|
|
||||||
<GroupOption>
|
|
||||||
<CommonProperty>
|
|
||||||
<UseCPPCompiler>0</UseCPPCompiler>
|
|
||||||
<RVCTCodeConst>0</RVCTCodeConst>
|
|
||||||
<RVCTZI>0</RVCTZI>
|
|
||||||
<RVCTOtherData>0</RVCTOtherData>
|
|
||||||
<ModuleSelection>0</ModuleSelection>
|
|
||||||
<IncludeInBuild>0</IncludeInBuild>
|
|
||||||
<AlwaysBuild>2</AlwaysBuild>
|
|
||||||
<GenerateAssemblyFile>2</GenerateAssemblyFile>
|
|
||||||
<AssembleAssemblyFile>2</AssembleAssemblyFile>
|
|
||||||
<PublicsOnly>2</PublicsOnly>
|
|
||||||
<StopOnExitCode>11</StopOnExitCode>
|
|
||||||
<CustomArgument></CustomArgument>
|
|
||||||
<IncludeLibraryModules></IncludeLibraryModules>
|
|
||||||
<ComprImg>1</ComprImg>
|
|
||||||
</CommonProperty>
|
|
||||||
<GroupArmAds>
|
|
||||||
<Cads>
|
|
||||||
<interw>2</interw>
|
|
||||||
<Optim>0</Optim>
|
|
||||||
<oTime>2</oTime>
|
|
||||||
<SplitLS>2</SplitLS>
|
|
||||||
<OneElfS>2</OneElfS>
|
|
||||||
<Strict>2</Strict>
|
|
||||||
<EnumInt>2</EnumInt>
|
|
||||||
<PlainCh>2</PlainCh>
|
|
||||||
<Ropi>2</Ropi>
|
|
||||||
<Rwpi>2</Rwpi>
|
|
||||||
<wLevel>0</wLevel>
|
|
||||||
<uThumb>2</uThumb>
|
|
||||||
<uSurpInc>2</uSurpInc>
|
|
||||||
<uC99>2</uC99>
|
|
||||||
<uGnu>2</uGnu>
|
|
||||||
<useXO>2</useXO>
|
|
||||||
<v6Lang>0</v6Lang>
|
|
||||||
<v6LangP>0</v6LangP>
|
|
||||||
<vShortEn>2</vShortEn>
|
|
||||||
<vShortWch>2</vShortWch>
|
|
||||||
<v6Lto>2</v6Lto>
|
|
||||||
<v6WtE>2</v6WtE>
|
|
||||||
<v6Rtti>2</v6Rtti>
|
|
||||||
<VariousControls>
|
|
||||||
<MiscControls></MiscControls>
|
|
||||||
<Define></Define>
|
|
||||||
<Undefine></Undefine>
|
|
||||||
<IncludePath></IncludePath>
|
|
||||||
</VariousControls>
|
|
||||||
</Cads>
|
|
||||||
<Aads>
|
|
||||||
<interw>2</interw>
|
|
||||||
<Ropi>2</Ropi>
|
|
||||||
<Rwpi>2</Rwpi>
|
|
||||||
<thumb>2</thumb>
|
|
||||||
<SplitLS>2</SplitLS>
|
|
||||||
<SwStkChk>2</SwStkChk>
|
|
||||||
<NoWarn>2</NoWarn>
|
|
||||||
<uSurpInc>2</uSurpInc>
|
|
||||||
<useXO>2</useXO>
|
|
||||||
<ClangAsOpt>0</ClangAsOpt>
|
|
||||||
<VariousControls>
|
|
||||||
<MiscControls></MiscControls>
|
|
||||||
<Define></Define>
|
|
||||||
<Undefine></Undefine>
|
|
||||||
<IncludePath></IncludePath>
|
|
||||||
</VariousControls>
|
|
||||||
</Aads>
|
|
||||||
</GroupArmAds>
|
|
||||||
</GroupOption>
|
|
||||||
</Group>
|
|
||||||
</Groups>
|
</Groups>
|
||||||
</Target>
|
</Target>
|
||||||
</Targets>
|
</Targets>
|
||||||
|
|
@ -930,6 +791,12 @@
|
||||||
<targetInfo name="Target 1"/>
|
<targetInfo name="Target 1"/>
|
||||||
</targetInfos>
|
</targetInfos>
|
||||||
</component>
|
</component>
|
||||||
|
<component Capiversion="2.2.0" Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="Custom" Cvendor="ARM" Cversion="1.0.0" custom="1">
|
||||||
|
<package name="CMSIS" schemaVersion="1.7.7" url="http://www.keil.com/pack/" vendor="ARM" version="5.9.0"/>
|
||||||
|
<targetInfos>
|
||||||
|
<targetInfo name="Target 1"/>
|
||||||
|
</targetInfos>
|
||||||
|
</component>
|
||||||
<component Capiversion="2.2.0" Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cvendor="ARM" Cversion="1.0.0" custom="1">
|
<component Capiversion="2.2.0" Cclass="CMSIS Driver" Cgroup="Ethernet" Csub="Custom" Cvendor="ARM" Cversion="1.0.0" custom="1">
|
||||||
<package name="CMSIS" schemaVersion="1.7.7" url="http://www.keil.com/pack/" vendor="ARM" version="5.9.0"/>
|
<package name="CMSIS" schemaVersion="1.7.7" url="http://www.keil.com/pack/" vendor="ARM" version="5.9.0"/>
|
||||||
<targetInfos>
|
<targetInfos>
|
||||||
|
|
@ -942,30 +809,6 @@
|
||||||
<targetInfo name="Target 1"/>
|
<targetInfo name="Target 1"/>
|
||||||
</targetInfos>
|
</targetInfos>
|
||||||
</component>
|
</component>
|
||||||
<component Cclass="FreeRTOS" Cgroup="corePKCS11" Csub="Core Library" Cvendor="AWS" Cversion="3.0.1" condition="core_pkcs11_library Condition">
|
|
||||||
<package name="corePKCS11" schemaVersion="1.7.2" url="https://freertos-cmsis-packs.s3.us-west-2.amazonaws.com/" vendor="AWS" version="4.0.1"/>
|
|
||||||
<targetInfos>
|
|
||||||
<targetInfo excluded="1" name="Target 1"/>
|
|
||||||
</targetInfos>
|
|
||||||
</component>
|
|
||||||
<component Cclass="FreeRTOS" Cgroup="corePKCS11" Csub="Portable Abstraction Layer" Cvariant="Custom" Cvendor="AWS" Cversion="3.0.1" condition="core_pkcs11_no_port Condition">
|
|
||||||
<package name="corePKCS11" schemaVersion="1.7.2" url="https://freertos-cmsis-packs.s3.us-west-2.amazonaws.com/" vendor="AWS" version="4.0.1"/>
|
|
||||||
<targetInfos>
|
|
||||||
<targetInfo excluded="1" name="Target 1"/>
|
|
||||||
</targetInfos>
|
|
||||||
</component>
|
|
||||||
<component Cclass="FreeRTOS" Cgroup="corePKCS11" Csub="Utilities" Cvendor="AWS" Cversion="3.0.1" condition="core_pkcs11_utilities Condition">
|
|
||||||
<package name="corePKCS11" schemaVersion="1.7.2" url="https://freertos-cmsis-packs.s3.us-west-2.amazonaws.com/" vendor="AWS" version="4.0.1"/>
|
|
||||||
<targetInfos>
|
|
||||||
<targetInfo excluded="1" name="Target 1"/>
|
|
||||||
</targetInfos>
|
|
||||||
</component>
|
|
||||||
<component Capiversion="2.4.0-errata1" Cclass="Security" Cgroup="PKCS11" Csub="corePKCS11" Cvendor="AWS" Cversion="3.0.1" condition="pkcs11_implementation Condition">
|
|
||||||
<package name="corePKCS11" schemaVersion="1.7.2" url="https://freertos-cmsis-packs.s3.us-west-2.amazonaws.com/" vendor="AWS" version="4.0.1"/>
|
|
||||||
<targetInfos>
|
|
||||||
<targetInfo excluded="1" name="Target 1"/>
|
|
||||||
</targetInfos>
|
|
||||||
</component>
|
|
||||||
<component Cclass="Device" Cgroup="EVAL" Csub="GD32F107C" Cvendor="GigaDevice" Cversion="2.0.2" condition="GD32F10x STDPERIPHERALS EVAL">
|
<component Cclass="Device" Cgroup="EVAL" Csub="GD32F107C" Cvendor="GigaDevice" Cversion="2.0.2" condition="GD32F10x STDPERIPHERALS EVAL">
|
||||||
<package name="GD32F10x_DFP" schemaVersion="1.2" url="https://gd32mcu.com/data/documents/pack/" vendor="GigaDevice" version="2.0.3"/>
|
<package name="GD32F10x_DFP" schemaVersion="1.2" url="https://gd32mcu.com/data/documents/pack/" vendor="GigaDevice" version="2.0.3"/>
|
||||||
<targetInfos>
|
<targetInfos>
|
||||||
|
|
@ -1044,12 +887,6 @@
|
||||||
<targetInfo name="Target 1"/>
|
<targetInfo name="Target 1"/>
|
||||||
</targetInfos>
|
</targetInfos>
|
||||||
</component>
|
</component>
|
||||||
<component Capiversion="2.0.0" Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Csub="DP83848C" Cvendor="Keil" Cversion="6.2.0" condition="CMSIS Core">
|
|
||||||
<package name="CMSIS-Driver" schemaVersion="1.7.7" url="https://www.keil.com/pack/" vendor="ARM" version="2.7.2"/>
|
|
||||||
<targetInfos>
|
|
||||||
<targetInfo name="Target 1"/>
|
|
||||||
</targetInfos>
|
|
||||||
</component>
|
|
||||||
</components>
|
</components>
|
||||||
<files>
|
<files>
|
||||||
<file attr="config" category="source" name="Device\Utilities\gd32f107c_eval.c" version="2.0.2">
|
<file attr="config" category="source" name="Device\Utilities\gd32f107c_eval.c" version="2.0.2">
|
||||||
|
|
|
||||||
8
main.c
8
main.c
|
|
@ -55,9 +55,9 @@
|
||||||
|
|
||||||
#define TEST_RUNNER_TASK_STACK_SIZE 512
|
#define TEST_RUNNER_TASK_STACK_SIZE 512
|
||||||
|
|
||||||
#define mainCREATE_SIMPLE_UDP_CLIENT_SERVER_TASKS 1
|
#define mainCREATE_SIMPLE_UDP_CLIENT_SERVER_TASKS 0
|
||||||
#define mainCREATE_TCP_ECHO_TASKS_SINGLE 0
|
#define mainCREATE_TCP_ECHO_TASKS_SINGLE 0
|
||||||
#define mainCREATE_TCP_ECHO_SERVER_TASK 0
|
#define mainCREATE_TCP_ECHO_SERVER_TASK 1
|
||||||
|
|
||||||
/* Simple UDP client and server task parameters. */
|
/* Simple UDP client and server task parameters. */
|
||||||
#define mainSIMPLE_UDP_CLIENT_SERVER_TASK_PRIORITY ( tskIDLE_PRIORITY )
|
#define mainSIMPLE_UDP_CLIENT_SERVER_TASK_PRIORITY ( tskIDLE_PRIORITY )
|
||||||
|
|
@ -219,7 +219,7 @@ static void vInitMCU(void)
|
||||||
|
|
||||||
gpio_init(RMII_MDC_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_MDC);
|
gpio_init(RMII_MDC_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_MDC);
|
||||||
gpio_init(RMII_MDIO_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_MDIO);
|
gpio_init(RMII_MDIO_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_MDIO);
|
||||||
gpio_init(RMII_INT_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_INT);
|
gpio_init(RMII_INT_PORT, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, RMII_INT);
|
||||||
|
|
||||||
gpio_init(RMII_REF_CLK_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_MCO);
|
gpio_init(RMII_REF_CLK_PORT, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, RMII_MCO);
|
||||||
|
|
||||||
|
|
@ -300,7 +300,7 @@ int main(void)
|
||||||
xTaskCreate( vTaskToggleLed, "ToggleLed", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY+1, NULL);
|
xTaskCreate( vTaskToggleLed, "ToggleLed", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY+1, NULL);
|
||||||
xTaskCreate( vTaskHelloWorld, "HelloWorld", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY+1, NULL);
|
xTaskCreate( vTaskHelloWorld, "HelloWorld", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY+1, NULL);
|
||||||
FreeRTOS_IPInit( ucIPAddress, ucNetMask, ucGatewayAddress, ucDNSServerAddress, ucMACAddress );
|
FreeRTOS_IPInit( ucIPAddress, ucNetMask, ucGatewayAddress, ucDNSServerAddress, ucMACAddress );
|
||||||
vStartSimpleTCPServerTasks( configMINIMAL_STACK_SIZE*2, tskIDLE_PRIORITY+1 );
|
// vStartSimpleTCPServerTasks( configMINIMAL_STACK_SIZE*2, tskIDLE_PRIORITY+1 );
|
||||||
vTaskStartScheduler();
|
vTaskStartScheduler();
|
||||||
while(1);
|
while(1);
|
||||||
}
|
}
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue